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Author: tfox
Forked from: tfox/8w_q
Project access type: Public
Description:
This is my 8-bit CPU design implementing my DOT (Does One Thing) ISA. It supports 8 instructions; it has four 8-bit registers, 256 addressable 8-bit data memory locations, a bank of 4 selectable instruction memories supporting 16 8-bit instructions each, and external displays for monitoring the output.
Video Demonstration: YouTube
Note: When testing, please ensure that the clock starts at 0 and the reset button has been clicked before running the program to ensure accurate output. Data memory can be viewed after the program has run by sending 1 to DM_dump and then viewing your browser's console (Ctrl + Shift + K in Firefox and Ctrl + Shift + I in Chrome).
Instructions:
init pos, Rx, imm :: 00 | pos | Rx | imm
This instruction overwrites Rx {00, 01, 10, 11} with value imm {00, 01, 10, 11} at bit position {11 = [7:6], 10 = [5:4], 01 = [3:2], 00 = [1:0]}.
addi Rx, imm :: 0100 | Rx | imm
This instruction adds to Rx {00, 01, 10, 11} the sign-extended value imm {10 = -2, 11 = -1, 00 = 0, 01 = 1} and stores the result to Rx.
add Rx, Ry :: 0101 | Rx | Ry
Rx = Rx + Ry
xor Rx, Ry :: 0110 | Rx | Ry
Rx = Rx XOR Ry
sb Rx, (Ry) :: 1000 | Rx | Ry
DM[Ry] = Rx
swid Rx, (Ry) :: 1101 | Rx | Ry
DM[Ry + 0x80] = bitwidth(Rx)
check :: 11100000
if (R0 < 0x64): PC goes back 5 instructions; else: PC++
halt :: 11111111
ends the program
Created: Oct 29, 2020
Updated: Aug 26, 2023
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