project.name

Harsh Singhal

Member since: 4 years

Educational Institution: ajay kumar garg engineering college

Country: India

full adder

full adder
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3*8 decoder

3*8 decoder
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2*4 decoder

2*4 decoder
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binary to grey

binary to grey
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grey to binary

grey to binary
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SR flip-flop

SR flip-flop
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JK flip flop

JK flip flop
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8-bit register

8-bit register
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8-bit ALU

8-bit ALU
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half adder

half adder
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general register

general register
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3*8 decoder using 2*4

3*8 decoder using 2*4
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3*8 decoder using truth table

3*8 decoder using truth table
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general register organisation

general register organisation
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project.name
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Harsh Singhal is not a collaborator of any project.

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