Member since: 4 years
Educational Institution: Institute of Technology of Cambodia
Country: Cambodia
RAM
RAMAdder
Adder2-bit syn counter
2-bit syn counter4bitadder
4bitadderUntitled
UntitledSimple counter
Simple counterMemory Test
Memory TestChapter 4 Examples
Chapter 4 ExamplesI3 TP3 2020
I3 TP3 2020Untitled
UntitledTimer___Vichea
Timer___VicheaTP6
TP6Testresit
TestresitCSC4536
CSC4536test jk
test jkLab 5
Lab 5example1
example1Untitled
UntitledRing Counter
Ring CounterBinary to BCD
Binary to BCDAsyn Counte
Asyn CounteError detection and correction
Error detection and correctionCompare A and B
Compare A and BClock and Counters
Clock and CountersTP 5
TP 5TP05
TP05Counter
CounterUntitled
UntitledI3 TP3 2020
I3 TP3 2020Decade Counter
Decade CounterClock and Counters
Clock and CountersRead write op using RAM IC
Read write op using RAM ICUntitled
UntitledGIC2324-CSLProject-5A-CPU
GIC2324-CSLProject-5A-CPURAM(32words x 10size)
RAM(32words x 10size)CPU
CPULogicMiniProject-Group10/ Name Stop_Watch
LogicMiniProject-Group10/ Name Stop_WatchError
ErrorFinal_exam rebuild
Final_exam rebuildFinal exam
Final examd flipflop
d flipflop4-Bit Synchronous Decade Counter
4-Bit Synchronous Decade CounterUntitled
UntitledGIC2324-CSLProject-5A-CPU
GIC2324-CSLProject-5A-CPUTimedTraffic
TimedTrafficRe-exam cls 2
Re-exam cls 2Untitled
UntitledECE 265 Lab 6 : 3-Step Unlock
ECE 265 Lab 6 : 3-Step UnlockTimedTraffic
TimedTrafficMini_project_Chheng_Sophin
Mini_project_Chheng_Sophintest_CPU_project
test_CPU_projectCPU
CPULogicMiniProject-Group10/ Name Timer
LogicMiniProject-Group10/ Name TimerProject1-CPU
Project1-CPURGB LED Matrix
RGB LED MatrixLogicMiniProject-Group10/ Name Stop_Watch
LogicMiniProject-Group10/ Name Stop_WatchCSC4536-new
CSC4536-newHalf and Full Subtractor
Half and Full SubtractorError detection and correction
Error detection and correction7 segments display
7 segments displayBinary to BCD
Binary to BCDI3 TP2 2020
I3 TP2 2020TP4
TP4I3 TP1 2020
I3 TP1 2020test
testBCD to Binary
BCD to BinaryI3 TP3 2020
I3 TP3 2020mini computer
mini computerTP1-HeangSopagna
TP1-HeangSopagnaLengBuntith_TP1
LengBuntith_TP1TP02
TP02TP2
TP2f(A,B,C)
f(A,B,C)f(d,e,f)
f(d,e,f)HeangSopagna-ITC-CSL-TP5
HeangSopagna-ITC-CSL-TP5HeangSopagna-ITC-CSL-TP6
HeangSopagna-ITC-CSL-TP6TP5
TP5testing
testingUntitled
Untitledtest1
test1timer__
timer__Timer___Vichea
Timer___VicheaMini_project_Chheng_Sophin
Mini_project_Chheng_SophinFINAL EXAM
FINAL EXAMLogicMiniProject-Group10/ Name Timer
LogicMiniProject-Group10/ Name TimerLogicMiniProject-Group10/ Name Stop_Watch
LogicMiniProject-Group10/ Name Stop_WatchLogicMiniProject-Group10/ Name Simple_watch
LogicMiniProject-Group10/ Name Simple_watchITC-CSL-LogicMiniProject-Group4
ITC-CSL-LogicMiniProject-Group4Re-exam cls 2
Re-exam cls 2Re-Exam Exercise 5
Re-Exam Exercise 5Re-Exam Exercise 4
Re-Exam Exercise 4Hok_Kolboth_Exercise_5
Hok_Kolboth_Exercise_5Re-Exam_BUN_Arya
Re-Exam_BUN_AryaFinal_exam rebuild
Final_exam rebuildFinal exam
Final examGIC2122-CSLProject-Group9 Digital Clock
GIC2122-CSLProject-Group9 Digital ClockTraffic Light system
Traffic Light systemDigital Clock (Group12)
Digital Clock (Group12)Final_Project
Final_ProjectTraffic light system V3
Traffic light system V3CSL2 - Project SAP Latest
CSL2 - Project SAP LatestTraffic Light
Traffic Lighttraffic light with left turn
traffic light with left turnCPU
CPUTraffic Light
Traffic Light8 Bit Central Processing Unit
8 Bit Central Processing UnitTraffic light
Traffic lightTraffic light
Traffic lightcpu
cpuTrafficLight
TrafficLightCPU
CPUGIC2324-CSLProject-A7-TRAFFIC LIGHT
GIC2324-CSLProject-A7-TRAFFIC LIGHTGIC2324-CSLProject-A7-CPU
GIC2324-CSLProject-A7-CPU2024_CSL_Project1_GroupD5
2024_CSL_Project1_GroupD52024_CSL_Project2_GroupD5
2024_CSL_Project2_GroupD5