project.name

Rathpisey Heng

Member since: 4 years

Educational Institution: Institute of Technology of Cambodia

Country: Cambodia

RAM

RAM
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Adder

Adder
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2-bit syn counter

2-bit syn counter
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Untitled

Untitled
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Simple counter

Simple counter
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Memory Test

Memory Test
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Chapter 4 Examples

Chapter 4 Examples
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I3 TP3 2020

I3 TP3 2020
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Untitled

Untitled
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Timer___Vichea

Timer___Vichea
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TP6

TP6
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Testresit

Testresit
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CSC4536

CSC4536
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test jk

test jk
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Lab 5

Lab 5
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example1

example1
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Untitled

Untitled
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Ring Counter

Ring Counter
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Binary to BCD

Binary to BCD
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Asyn Counte

Asyn Counte
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Error detection and correction

Error detection and correction
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Clock and Counters

Clock and Counters
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TP 5

TP 5
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Counter

Counter
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Untitled

Untitled
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I3 TP3 2020

I3 TP3 2020
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Decade Counter

Decade Counter
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Clock and Counters

Clock and Counters
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Read write op using RAM IC

Read write op using RAM IC
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Untitled

Untitled
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GIC2324-CSLProject-5A-CPU

GIC2324-CSLProject-5A-CPU
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RAM(32words x 10size)

RAM(32words x 10size)
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CPU

CPU
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Error

Error
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Final_exam rebuild

Final_exam rebuild
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Final exam

Final exam
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d flipflop

d flipflop
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4-Bit Synchronous Decade Counter

4-Bit Synchronous Decade Counter
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Untitled

Untitled
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TP05

TP05
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GIC2324-CSLProject-5A-CPU

GIC2324-CSLProject-5A-CPU
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Re-exam cls 2

Re-exam cls 2
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Untitled

Untitled
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Mini_project_Chheng_Sophin

Mini_project_Chheng_Sophin
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test_CPU_project

test_CPU_project
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CPU

CPU
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LogicMiniProject-Group10/ Name Timer

LogicMiniProject-Group10/ Name Timer
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Project1-CPU

Project1-CPU
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LogicMiniProject-Group10/ Name Stop_Watch

LogicMiniProject-Group10/ Name Stop_Watch
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CSC4536-new

CSC4536-new
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LogicMiniProject-Group10/ Name Stop_Watch

LogicMiniProject-Group10/ Name Stop_Watch
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Compare A and B

Compare A and B
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TimedTraffic

TimedTraffic
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ECE 265 Lab 6 : 3-Step Unlock

ECE 265 Lab 6 : 3-Step Unlock
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TimedTraffic

TimedTraffic
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RGB LED Matrix

RGB LED Matrix
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Half and Full Subtractor

Half and Full Subtractor
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