CODE CONVERTORS

HALF ADDER

4 TO 16

1 to 2 DEMUX

AND USING 2 TO 1 MUX

1 to 16 DEMUX

1 to 8 DEMUX

4 bit synchronous down counter

FULL SUBTRACTOR

Hlaf adder

Full subtractor using basic gates

HALF ADDER USING BASIC GATES

Hlaf adder

GRAY TO BINARY CODE CONVERTER

Half subtractor using basic gates

Untitled

AND gate

AND OR EXOR NAND NOR EXNOR NOT GATES

FULL SUBTRACTOR

NAND BASED SR FLIPFLOP

COMMUTATIVE LAW OF MULTIPLICATION

4 BIT UNIVERSAL SHIFT REGISTER

FULL ADDER USING NOR GATES

BINARY TO GRAY CODE CONVERTER

4 to 2 priority encoder

8 TO 3 PRIORITY ENCODER

BCD to 7 segment decoder

ENCODER

4 bit ripple counter with decoded outputs

4 bit ripple counter

4 bit synchronous down counter

SR FLIPFLOP

TFF

DFF USING JKFF

D FLIPFLOP

T FLIPFLOP

JK FLIPFLOP

DFF USING TFF

TFF USING JKFF

3 bit Parity Checker

4-bit parity Checker

4 to 1 MUX

1 to 8 DEMUX

16 to 1 mux

4 bit synchronous counter

4 bit synchronous UP/DOWN counter

4 bit synchronous down counter

implementation of full adder using counter

HALF ADDER

counter that counts 0,2,4,7,0

PIPO

sequence generator using counter

3 bit binary counter

ASSOCIATIVE LAW OF ADDITION

ASSOCIATIVE LAW OF MULTIPLICATION

Verification of Boolean postulates and laws

FULL ADDER USING TWO HALF ADDERS

HALF ADDER USING MINIMAL NUMBER OF NAND GATES

EXCESS-3 TO BCD

BCD TO EXCESS-3

HALF ADDER-NOR NOR GATES

MOD 7 COUNTER

HALF ADDER USING BASIC GATES

3 bit parity generator

DFF USING SRFF

HALF ADDER-NAND NAND IMPLEMENTATION

COMMUTATIVE LAW AND ASSOCIATIVE LAW

Demorgans theorem-I

BCD to Decimal Decoder

Decimal to BCD Encoder

JK FLIPFLOP

FULL ADDER USING NAND GATES

PISO

8 to 1 MUX

Full adder using 2 hald adders

Demorgans theprem-II

RIPPLE CARRY SUBTRACTOR

FULL ADDER USING XOR GATES

implementation of full adder with mux and counter

4 bit bidirectional shift register

HALF ADDER-NAND NAND IMPLEMENTATION

CONSENSUS THEOREM

1.Half Adder

SISO

AND & OR GATE

DE MORGAN THEOREM AND BOOLEAN LAW OF ADDITION AND MULTIPLICATION

2 bit Magnitude Comparator

GRAY TO BINARY CODE CONVERTER

4-bit parity Checker

COMMUTATIVE LAW OF ADDITION

GRAY TO BINARY CODE CONVERTER

Verification of Boolean postulates and laws

BCD ADDER

Half adder using basic gates

TFF USING DFF

3 BIT PARALLEL MULTIPLIER

SRFF using DFF

FULL ADDER USING NOR GATES

DISTRIBUTIVE LAW AND ABSORPTION LAW

TFF USING SRFF

MUX with counter

Ripple carry Adder

HALF ADDER USING MINIMAL NUMBER OF NAND GATES

Boolean potulates and laws