project.name

Rishikesh Mungase

Member since: 4 years

Educational Institution: Not Entered

Country: India

JK FF to D FF

JK FF to D FF
Public
project.name

2 bit asynchronus counter using JK FF

2 bit asynchronus counter using JK FF
Public
project.name

SR Flip Flop

SR Flip Flop
Public
project.name

JK Flip Flop

JK Flip Flop
Public
project.name

SR to JK FF

SR to JK FF
Public
project.name

74153 MUX

74153 MUX
Public
project.name

JK to SR FF

JK to SR FF
Public
project.name

Implementation of (0,2,4,7) by dual 4:1 MUX

Implementation of (0,2,4,7) by dual 4:1 MUX
Public
project.name

Full Adder Using Nand Gate

Full Adder Using Nand Gate
Public
project.name

3 bit synchronus counter using JK FF

3 bit synchronus counter using JK FF
Public
project.name
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