Borade Rasika Jagdish - Circuits

Borade Rasika Jagdish

Member since: 3 years

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half adder using A)basics gates

half adder using A)basics gates

Public

project.name

OR gate

OR gate

Public

project.name

case studt

case studt

Public

project.name

implementation of parity generator and checker

implementation of parity generator and checker

Public

project.name

practicle B) 2 BCD to Excess-3

practicle B) 2 BCD to Excess-3

Public

project.name

2 bit comparator

2 bit comparator

Public

project.name

full adder circuit

full adder circuit

Public

project.name

half adder using B) NAND gates

half adder using B) NAND gates

Public

project.name

NOR, NAND & NOR gates

NOR, NAND & NOR gates

Public

project.name

And gate

And gate

Public

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