project.name

Dev Manek

Member since: 4 years

Educational Institution: Not Entered

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8:1 using 2:1

8:1 using 2:1
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Ring counter

Ring counter
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clock

clock
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FULL ADDER

FULL ADDER
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Full Adder

Full Adder
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HALF SUBRACTOR

HALF SUBRACTOR
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SUmmsa

SUmmsa
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0s detections

0s detections
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8:1 using 4:1

8:1 using 4:1
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Mux as full sub

Mux as full sub
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Ring&Twisted Counter (4-bit)

Ring&Twisted Counter (4-bit)
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Full Subtractor

Full Subtractor
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2:4 decoder

2:4 decoder
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Diwali lights

Diwali lights
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2-bit counter, limited to 3 numbers (0,1,2)

2-bit counter, limited to 3 numbers (0,1,2)
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Decoder

Decoder
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Sequence Detector

Sequence Detector
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