Helan Raffeal
Member since: 4 years
Educational Institution: Not Entered
Country: Not Entered
AND USING 2 TO 1 MUX
AND USING 2 TO 1 MUX
Public
counter that counts 0,2,4,7,0
counter that counts 0,2,4,7,0
Public
mod-6 unit distance counter
mod-6 unit distance counter
Public
implementation of full adder using counter
implementation of full adder using counter
Public
3 bit binary counter
3 bit binary counter
Public
SIPO
SIPO
Public
sequence generator using counter
sequence generator using counter
Public
4 BIT UNIVERSAL SHIFT REGISTER
4 BIT UNIVERSAL SHIFT REGISTER
Public
SISO
SISO
Public
PISO
PISO
Public
PIPO
PIPO
Public
4 bit ripple counter
4 bit ripple counter
Public
4 bit ripple down counter
4 bit ripple down counter
Public
MOD 12 COUNTER
MOD 12 COUNTER
Public
MOD 7 COUNTER
MOD 7 COUNTER
Public
implementation of full adder with mux and counter
implementation of full adder with mux and counter
Public
4 BIT UP-DOWN COUNTER
4 BIT UP-DOWN COUNTER
Public
4 bit synchronous down counter
4 bit synchronous down counter
Public
4 bit synchronous counter
4 bit synchronous counter
Public
4 bit synchronous counter with ripple carry
4 bit synchronous counter with ripple carry
Public
4 bit synchronous UP/DOWN counter
4 bit synchronous UP/DOWN counter
Public
4 bit bidirectional shift register
4 bit bidirectional shift register
Public
circuit that counts (0,2,4...14)when input is 1 and counts (1,3...15)when input is 0
circuit that counts (0,2,4...14)when input is 1 and counts (1,3...15)when input is 0
Public
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