project.name

Sajin S

Member since: 4 years

Educational Institution: Not Entered

Country: Not Entered

1 to 2 DEMUX

1 to 2 DEMUX
Public
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Full adder

Full adder
Public
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3 Bit parity generator

3 Bit parity generator
Public
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Full subtractor using NOR gates

Full subtractor using NOR gates
Public
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Full adder using NOR gate

Full adder using NOR gate
Public
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Binary to Gray code coverter

Binary to Gray code coverter
Public
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Decimal to BCD Encoder

Decimal to BCD Encoder
Public
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4 to 1 MUX

4 to 1 MUX
Public
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1 to 2 decoder

1 to 2 decoder
Public
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4 to 16 Decoder

4 to 16 Decoder
Public
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Boolean Posculates

Boolean Posculates
Public
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8 TO 3 PRIORITY ENCODER

8 TO 3 PRIORITY ENCODER
Public
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IMPLEMENTATION USING MINTERMS WITH 4:1 MUX

IMPLEMENTATION USING MINTERMS WITH 4:1 MUX
Public
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16 to 1 mux

16 to 1 mux
Public
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Single Bit Magnitude comparator

Single Bit Magnitude comparator
Public
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1:16 DEMUX

1:16 DEMUX
Public
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4 to 2 Encoder

4 to 2 Encoder
Public
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3 to 8 decoder

3 to 8 decoder
Public
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2 to 1 MUX using NOT gate

2 to 1 MUX using NOT gate
Public
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2 to 4 Decoder

2 to 4 Decoder
Public
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1:8 DEMUX

1:8 DEMUX
Public
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1 to 4 DEMUX

1 to 4 DEMUX
Public
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Octal to Binary Encoder

Octal to Binary Encoder
Public
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BCD to Excess-3 converter

BCD to Excess-3 converter
Public
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verification of logic gates usinEX-NOR(Y=(A'B+AB')')

verification of logic gates usinEX-NOR(Y=(A'B+AB')')
Public
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Full subtrator using NAND gate

Full subtrator using NAND gate
Public
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BCD to 7 segment decoder

BCD to 7 segment decoder
Public
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logic gate verification by OR gate (Y=A+B)

logic gate verification by OR gate (Y=A+B)
Public
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Excess-3 to BCD convertor

Excess-3 to BCD convertor
Public
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IMPLEMENTATION USING MINTERMS WITH 16:1 MUX

IMPLEMENTATION USING MINTERMS WITH 16:1 MUX
Public
project.name

logic gates verification by AND gate (Y=A.B)

logic gates verification by AND gate (Y=A.B)
Public
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3 bit parity checker

3 bit parity checker
Public
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Half adder using NOR gate

Half adder using NOR gate
Public
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Half adder using NAND gate

Half adder using NAND gate
Public
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3 to 8 decoder

3 to 8 decoder
Public
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logic gates for commutative property using addition(A+B=B+A)

logic gates for commutative property using addition(A+B=B+A)
Public
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Single bit magnitude comparator

Single bit magnitude comparator
Public
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Distributive law

Distributive law
Public
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logiv gate verification using NOT gate (Y=A')

logiv gate verification using NOT gate (Y=A')
Public
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Consensus theorum

Consensus theorum
Public
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Demorgans theorum

Demorgans theorum
Public
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Half subtractor

Half subtractor
Public
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logic gates to prove commutative property for multiplication

logic gates to prove commutative property for multiplication
Public
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logic gates verification by using NAND gate(Y=(A.B)')

logic gates verification by using NAND gate(Y=(A.B)')
Public
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verification of logic gates using EX-OR gate(Y=A'B+AB')

verification of logic gates using EX-OR gate(Y=A'B+AB')
Public
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4 Bit magnitude comparator

4 Bit magnitude comparator
Public
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4 Bit parity generator

4 Bit parity generator
Public
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Full substractor

Full substractor
Public
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2 to 1 MUX

2 to 1 MUX
Public
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IMPLEMENTATION USING MINTEMS WITH 2:1 MUX

IMPLEMENTATION USING MINTEMS WITH 2:1 MUX
Public
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BCD to Decimal Decoder

BCD to Decimal Decoder
Public
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4 to 2 priority encoder

4 to 2 priority encoder
Public
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2 to 1 Encoder

2 to 1 Encoder
Public
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Absorption theorum

Absorption theorum
Public
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4 Bit parity checker

4 Bit parity checker
Public
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2 to 1 mux using OR GATE

2 to 1 mux using OR GATE
Public
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1 to 2 Decoder

1 to 2 Decoder
Public
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Full adder using NAND gate

Full adder using NAND gate
Public
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4 to 2 priority encoder

4 to 2 priority encoder
Public
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24 to 1 MUX using 8 to 1 MUX

24 to 1 MUX using 8 to 1 MUX
Public
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8 to 1 mux

8 to 1 mux
Public
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2 to 1 Encoder

2 to 1 Encoder
Public
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32 to 1 mux using 4 to 1 mux

32 to 1 mux using 4 to 1 mux
Public
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2 Bit magnitude comparator

2 Bit magnitude comparator
Public
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logic gates verification using NOR gate(Y=(A+B)')

logic gates verification using NOR gate(Y=(A+B)')
Public
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Associative property

Associative property
Public
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Half adder

Half adder
Public
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Half subtractor using NAND gate

Half subtractor using NAND gate
Public
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Gray to binary code converter

Gray to binary code converter
Public
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2 to 1 mux using NAND gate

2 to 1 mux using NAND gate
Public
project.name

IMPLEMENTATION USING MINTERMS WITH 8:1 MUX

IMPLEMENTATION USING MINTERMS WITH 8:1 MUX
Public
project.name

Half subtractor using NOR gate

Half subtractor using NOR gate
Public
project.name
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