Sudipta Chakraborty
Member since: 4 years
Educational Institution: Bengal Institute of Technology, Kolkata
Country: India
DESIGN A LOGICAL UNIT WHICH WILL PERFORM 4 OPERATIONS AND,OR,NOT,XOR
DESIGN A LOGICAL UNIT WHICH WILL PERFORM 4 OPERATIONS AND,OR,NOT,XOR
DESIGN AND SIMULATE A RIPPLE CARRY ADDER
DESIGN AND SIMULATE A RIPPLE CARRY ADDER
DESIGN AND REALIZATION OF HALF ADDER AND HALF SUBTRACTOR CIRCUITS
DESIGN AND REALIZATION OF HALF ADDER AND HALF SUBTRACTOR CIRCUITS
DESIGN AND SIMULATE A 4-BIT ARITHMETIC UNIT
DESIGN AND SIMULATE A 4-BIT ARITHMETIC UNIT
DESIGN AND SIMULATE A 4-BIT ADDER SUBTRACTOR COMPOSITE UNIT
DESIGN AND SIMULATE A 4-BIT ADDER SUBTRACTOR COMPOSITE UNIT
DESIGN AND SIMULATE A 4-BIT BCD ADDER
DESIGN AND SIMULATE A 4-BIT BCD ADDER
DESIGN AND SIMULATE FULL SUBTRACTOR USING HALF SUBTRACTORS
DESIGN AND SIMULATE FULL SUBTRACTOR USING HALF SUBTRACTORS
DESIGN FULL ADDER USING HALF ADDERS AND FULL SUBTRACTOR USING HALF SUBTRACTORS
DESIGN FULL ADDER USING HALF ADDERS AND FULL SUBTRACTOR USING HALF SUBTRACTORS
DESIGN AND REALIZATION OF FULL ADDER AND FULL SUBTRACTOR CIRCUITS
DESIGN AND REALIZATION OF FULL ADDER AND FULL SUBTRACTOR CIRCUITS
DESIGN AND REALIZATION OF BASIC LOGIC GATES USING SIMULATOR
DESIGN AND REALIZATION OF BASIC LOGIC GATES USING SIMULATOR
(A) DESIGN AND SIMULATE A 2:1 MUX, (B) CASCADE THREE 2:1 MUXs TO DESIGN A 4:1 MUX
(A) DESIGN AND SIMULATE A 2:1 MUX, (B) CASCADE THREE 2:1 MUXs TO DESIGN A 4:1 MUX
DESIGN AND REALIZATION OF BASIC LOGIC GATES USING SIMULATOR
DESIGN AND REALIZATION OF BASIC LOGIC GATES USING SIMULATOR
DESIGN FULL ADDER USING HALF ADDERS AND FULL SUBTRACTOR USING HALF SUBTRACTORS
DESIGN FULL ADDER USING HALF ADDERS AND FULL SUBTRACTOR USING HALF SUBTRACTORS
(A) DESIGN AND SIMULATE A 2:1 MUX, (B) CASCADE THREE 2:1 MUXs TO DESIGN A 4:1 MUX
(A) DESIGN AND SIMULATE A 2:1 MUX, (B) CASCADE THREE 2:1 MUXs TO DESIGN A 4:1 MUX
DESIGN AND SIMULATE A 4-BIT BCD ADDER
DESIGN AND SIMULATE A 4-BIT BCD ADDER
DESIGN AND REALIZATION OF HALF ADDER AND HALF SUBTRACTOR CIRCUITS
DESIGN AND REALIZATION OF HALF ADDER AND HALF SUBTRACTOR CIRCUITS
DESIGN AND SIMULATE A 4-BIT ADDER SUBTRACTOR COMPOSITE UNIT
DESIGN AND SIMULATE A 4-BIT ADDER SUBTRACTOR COMPOSITE UNIT
DESIGN AND SIMULATE A RIPPLE CARRY ADDER
DESIGN AND SIMULATE A RIPPLE CARRY ADDER
DESIGN AND SIMULATE A 4-BIT ARITHMETIC UNIT
DESIGN AND SIMULATE A 4-BIT ARITHMETIC UNIT
DESIGN AND SIMULATE FULL SUBTRACTOR USING HALF SUBTRACTORS
DESIGN AND SIMULATE FULL SUBTRACTOR USING HALF SUBTRACTORS
