project.name

Vaishnavi bhujbal

Member since: 4 years

Educational Institution: Not Entered

Country: Not Entered

FF conversions

FF conversions
Public
project.name

2 bit up and down counter

2 bit up and down counter
Public
project.name

sequence detector moore model(1001)

sequence detector moore model(1001)
Public
project.name

2 bit up and down counter

2 bit up and down counter
Public
project.name

1-bit Comparator

1-bit Comparator
Public
project.name

4 bit down counter

4 bit down counter
Public
project.name

4 bit down counter

4 bit down counter
Public
project.name

full adder

full adder
Public
project.name

16:1 mux using 2:1 mux

16:1 mux using 2:1 mux
Public
project.name

3-bit up counter using JK flipflop

3-bit up counter using JK flipflop
Public
project.name

Fliip flo conversion

Fliip flo conversion
Public
project.name

jk to sr and vice versa

jk to sr and vice versa
Public
project.name

sequence detector

sequence detector
Public
project.name

half adder

half adder
Public
project.name

2 bit comparator

2 bit comparator
Public
project.name

Sequence detector

Sequence detector
Public
project.name

sequence detector 1001 (melay)

sequence detector 1001 (melay)
Public
project.name

Flip flop conversion

Flip flop conversion
Public
project.name

Parity generator

Parity generator
Public
project.name
No result image
Vaishnavi bhujbal doesn't have any favourites.
No result image
Vaishnavi bhujbal is not a collaborator of any project.