IMPLEMENTATION USING MINTEMS WITH 2TO 1 MUX

16-Bit Parity checker

2 TO 1 MUX USING AND

2 TO 1 MUX USING OR

2 to 1 MUX using EXOR gate

1 to 2 DEMUX

XS 3 TO BCD

Octal to Binary Encoder

4 to 2 ENCODER

counters

1:8 DEMUX

4 bit binary to gray

4 TO 1 MUX

Decimal to BCD Encoder

2 to 1 MUX using NAND gate

2 TO 1 ENCODER

BCD to DECIMAL DECODER

IMPLEMENTATION USING MINTERMS WITH 4:1 MUX

gray to binary code convertor

4 bit full adder

de morgan's theorem

COUNTERS

4 TO 1 MUX

LOGIC GATES

consensus theorem-2

boolean expression

absorption law

commutative property(a),(b)

BCD TO XS 3

XS TO BCD

full substractor

full adder

half subractor

Full Adder Using NAND gate

Full Adder Using NAND gate

Full Adder Using NAND gate

Full Adder using NOR Gate

distributive law(a),(b)

16 TO 1 MUX

1 bit magnitude comparator

24 to 1 MUX using 8 to 1 MUX

boolean expressions

3 BIT PARITY GENERATOR

3 BIT PARITY CHECKER

excess to BCD convertor

1 to 4 DEMUX

2 to 4 Decoder

BINARY TO GRAY

1 TO 2 DECODER

4-Bit Magnitude Comparator

4 bit excess 3 to BCD

4 TO 1 MUX

1:16 DEMUX

3 to 8 DECODER

4 bit parity generator

4 BIT PARITY CHECKER

2 TO 1 MUX

8 to 3 Priority Encoder

BCD to 7 Segment Decoder

2- BIT MAGNITUDE COMPARATOR

IMPLEMENTATION USING MINTERMS WITH 16:1 MUX

4 TO 16 DECODER

EXAMPLE EXPRESSION -1

16 bit parity generator

2 to 1 MUX using NOR gate

8 TO 1 MUX

4 bit BCD to XS 3

IMPLEMENTATION USING MINTERMS WITH 8:1 MUX

4 to 2 Priority Encoder

2 to 1 MUX using NOT gate

BCD TO 7 SEGMENT DECODER 7

4 bit gray to binary

32 to 1 MUX using 4 to 1 MUX

associative property

Full Adder using NOR Gate

EXAMPLE EXPRESSION -2

half adder

2- BIT MAGNITUDE COMPARATOR

absorption law