project.name

Raghavi P.S

Member since: 4 years

Educational Institution: Not Entered

Country: India

OR GATE

OR GATE
Public
project.name

2-1 Multiplexer

2-1 Multiplexer
Public
project.name

MUX

MUX
Public
project.name

FLIPFLOPSS

FLIPFLOPSS
Public
project.name

ASSOCIATIVE PROPERTY

ASSOCIATIVE PROPERTY
Public
project.name

Absorption theorum

Absorption theorum
Public
project.name

Associative property

Associative property
Public
project.name

Full Subtractor using NAND gate

Full Subtractor using NAND gate
Public
project.name

Full Subtractor

Full Subtractor
Public
project.name

8 bit parity checker

8 bit parity checker
Public
project.name

8 to 1 MUX

8 to 1 MUX
Public
project.name

1:16 DEMUX

1:16 DEMUX
Public
project.name

MOD 12 COUNTER

MOD 12 COUNTER
Public
project.name

Multiplexers

Multiplexers
Public
project.name

adder 2

adder 2
Public
project.name

adder

adder
Public
project.name

half adder

half adder
Public
project.name

adder

adder
Public
project.name

EX-3

EX-3
Public
project.name

CODE CONVERTORS

CODE CONVERTORS
Public
project.name

ADDER

ADDER
Public
project.name

FULL ADDER

FULL ADDER
Public
project.name

Mux 8to 1

Mux 8to 1
Public
project.name

T FLIP FLOP Using SR FLIP FLOP

T FLIP FLOP Using SR FLIP FLOP
Public
project.name

8 to 3 Priority Encoder

8 to 3 Priority Encoder
Public
project.name

T FLIP FLOP

T FLIP FLOP
Public
project.name

PARALLEL IN PARALLEL OUT

PARALLEL IN PARALLEL OUT
Public
project.name

Distributive law

Distributive law
Public
project.name

D flipflop using nand gate

D flipflop using nand gate
Public
project.name

D FLIP FLOP USING SR FLIP FLOP

D FLIP FLOP USING SR FLIP FLOP
Public
project.name

serial in serial out

serial in serial out
Public
project.name

CODE CONVERTER

CODE CONVERTER
Public
project.name

4 : 1 multiplexer

4 : 1 multiplexer
Public
project.name

Mux 4:1

Mux 4:1
Public
project.name

jk flip flop using nand gate

jk flip flop using nand gate
Public
project.name

clocked rs flip flop using nand gate

clocked rs flip flop using nand gate
Public
project.name

rs flip flop using nand gate

rs flip flop using nand gate
Public
project.name

rs flip flop using nand gate

rs flip flop using nand gate
Public
project.name

REMAINING

REMAINING
Public
project.name

T FLIP FLOP USING D FLIP FLOP

T FLIP FLOP USING D FLIP FLOP
Public
project.name

JK FLIP FLOP USING T FLIP FLOP

JK FLIP FLOP USING T FLIP FLOP
Public
project.name

D FLIP FLOP using JK FLIP FLOP

D FLIP FLOP using JK FLIP FLOP
Public
project.name

4 bit ripple down counter

4 bit ripple down counter
Public
project.name

MOD 12 COUNTER

MOD 12 COUNTER
Public
project.name

Consensus Theorem

Consensus Theorem
Public
project.name

SHIFT COUNTER

SHIFT COUNTER
Public
project.name

Consensus Theorem

Consensus Theorem
Public
project.name

Distributive law

Distributive law
Public
project.name

CONSENSUS THEOREM

CONSENSUS THEOREM
Public
project.name

FULL ADDER

FULL ADDER
Public
project.name

Full substractor

Full substractor
Public
project.name

full adder using nand gate

full adder using nand gate
Public
project.name

Half Adder using NOR Gates

Half Adder using NOR Gates
Public
project.name

half adder using nand gates

half adder using nand gates
Public
project.name

Gray code to Binary code conversion

Gray code to Binary code conversion
Public
project.name

BCD to Excess-3 Code Converter

BCD to Excess-3 Code Converter
Public
project.name

8-bit comparator

8-bit comparator
Public
project.name

1 to 2 Demultiplexer

1 to 2 Demultiplexer
Public
project.name

2 to 1 MUX

2 to 1 MUX
Public
project.name

16 to 1 Multiplexer

16 to 1 Multiplexer
Public
project.name

4 to 1 MUX

4 to 1 MUX
Public
project.name

BCD to Decimal Decoder

BCD to Decimal Decoder
Public
project.name

PARALLEL IN SERIAL OUT

PARALLEL IN SERIAL OUT
Public
project.name

SHIFT COUNTER

SHIFT COUNTER
Public
project.name

REMAINING

REMAINING
Public
project.name

SERIAL IN SERIAL OUT

SERIAL IN SERIAL OUT
Public
project.name

synchronous up/down counter

synchronous up/down counter
Public
project.name

SERIAL IN PARALLEL OUT

SERIAL IN PARALLEL OUT
Public
project.name

RING COUNTER

RING COUNTER
Public
project.name

shift counter

shift counter
Public
project.name

Full Adder using NOR Gate

Full Adder using NOR Gate
Public
project.name

COMMUTATIVE PROPERTY

COMMUTATIVE PROPERTY
Public
project.name

HALF SUBTRACTOR USING NOR GATE

HALF SUBTRACTOR USING NOR GATE
Public
project.name

CODE CONVERTORS

CODE CONVERTORS
Public
project.name

gate

gate
Public
project.name

Untitled

Untitled
Public
project.name

AND GATE

AND GATE
Public
project.name

OR GATE

OR GATE
Public
project.name

OR GATE

OR GATE
Public
project.name

NOR GATE

NOR GATE
Public
project.name

EX-OR GATE

EX-OR GATE
Public
project.name

EXNOR-GATE

EXNOR-GATE
Public
project.name

DECODERS

DECODERS
Public
project.name

BCD TO 7 SEGMENT DECODER

BCD TO 7 SEGMENT DECODER
Public
project.name

parity

parity
Public
project.name

one

one
Public
project.name

4-BIT PARITY GENERATOR

4-BIT PARITY GENERATOR
Public
project.name

FA-BASIC

FA-BASIC
Public
project.name

half adder

half adder
Public
project.name

3 TO 8 DECODER

3 TO 8 DECODER
Public
project.name

FULL SUB

FULL SUB
Public
project.name

DeMorgan's theorem

DeMorgan's theorem
Public
project.name

4-bit Magnitude comparator

4-bit Magnitude comparator
Public
project.name

NAND GATE

NAND GATE
Public
project.name

NAND GATE

NAND GATE
Public
project.name

SERIAL IN PARALLEL OUT

SERIAL IN PARALLEL OUT
Public
project.name

T FLIP FLOP Using JK FLIP FLOP

T FLIP FLOP Using JK FLIP FLOP
Public
project.name

4 bit ripple down counter

4 bit ripple down counter
Public
project.name

FULL ADDER

FULL ADDER
Public
project.name

Associative property

Associative property
Public
project.name

BCD ADDER

BCD ADDER
Public
project.name

JK FLIP FLOP USING SR FLIP FLOP

JK FLIP FLOP USING SR FLIP FLOP
Public
project.name

D FLIP FLOP Using T FLIP FLOP

D FLIP FLOP Using T FLIP FLOP
Public
project.name

SR FLIP FLOP USING T FLIP FLOP

SR FLIP FLOP USING T FLIP FLOP
Public
project.name

SR FLIP FLOP USING JK FLIP FLOP

SR FLIP FLOP USING JK FLIP FLOP
Public
project.name

4 BIT RIPPLE UP COUNTER WITH DECODED OUTPUTS

4 BIT RIPPLE UP COUNTER WITH DECODED OUTPUTS
Public
project.name

Universal Shift Register

Universal Shift Register
Public
project.name

HALF SUBTRACTOR USING NAND GATE

HALF SUBTRACTOR USING NAND GATE
Public
project.name

parity generators

parity generators
Public
project.name

4-bit Magnitude comparator

4-bit Magnitude comparator
Public
project.name

SR FLIP FLOP USING T FLIP FLOP

SR FLIP FLOP USING T FLIP FLOP
Public
project.name

full adder using nand gate

full adder using nand gate
Public
project.name

Full Subtractor using NAND gate

Full Subtractor using NAND gate
Public
project.name

4 Bit magnitude comparator

4 Bit magnitude comparator
Public
project.name
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