project.name

Nachiket

Member since: 4 years

Educational Institution: K.J. Somaiya College of Engineering

Country: India

Exp8_Postlab Q1

Exp8_Postlab Q1
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Full Adder using Half Adder

Full Adder using Half Adder
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DLD Exp 2

DLD Exp 2
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10/11

10/11
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Shift Registers

Shift Registers
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Experiment 3

Experiment 3
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Exp 9

Exp 9
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DLD-Experiment 4

DLD-Experiment 4
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2 bit comparator

2 bit comparator
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Conversion of Flip Flop

Conversion of Flip Flop
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Exp 9

Exp 9
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4 bit asynchronous counter using T and JK

4 bit asynchronous counter using T and JK
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1 bit adder

1 bit adder
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4-bit Parallel-In Serial-Out (PISO) shift register

4-bit Parallel-In Serial-Out (PISO) shift register
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Subtractors

Subtractors
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DLD_Exp_5

DLD_Exp_5
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4 bit Johnson Counter

4 bit Johnson Counter
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