Member since: 4 years
Educational Institution: KIET GROUP OF INSTITUTIONS
Country: India
MULTIPLEXER
MULTIPLEXEREdge triggered FF
Edge triggered FF2 bit arithmetic logic unit
2 bit arithmetic logic unit1 x 16 Demultiplexer [email protected]
1 x 16 Demultiplexer [email protected]EXP 6 MULTIPLIER 2 X 2 ABHISHEK TYAGI 1923IT1200
EXP 6 MULTIPLIER 2 X 2 ABHISHEK TYAGI 1923IT12004*1mux
4*1mux2 TO 4 DECODER EXP 8 ABHISHEK TYAGI
2 TO 4 DECODER EXP 8 ABHISHEK TYAGI2 x 4 decoder circuit
2 x 4 decoder circuitEXP 3
EXP 3full adder
full adderexp 15 arithmetic logic unit
exp 15 arithmetic logic unitDemux
DemuxNOR Latch Abhishek tyagi exp 11
NOR Latch Abhishek tyagi exp 112 x 4 decoder circuit
2 x 4 decoder circuitEXP 14 ABHISHEK TYAGI
EXP 14 ABHISHEK TYAGIEXP 16 Design of Clocked sequenctial circuit to detect 3 or more consequetive 1s
EXP 16 Design of Clocked sequenctial circuit to detect 3 or more consequetive 1s8 to 3 encoder
8 to 3 encoderUntitled
UntitledJk flip flop exp 12 abhishek tyagi
Jk flip flop exp 12 abhishek tyagibasic gates
basic gatesLogic Gates
Logic Gates1 x 4 Demultiplexers
1 x 4 DemultiplexersExp 17 shift register JK flip flop
Exp 17 shift register JK flip flopbasic gates
basic gates3 bits carry ahead adder
3 bits carry ahead adderexp 15 arithmetic logic unit
exp 15 arithmetic logic unit8 x 1 mux EXP 9 ABHISHEK TYAGI 1923IT1200
8 x 1 mux EXP 9 ABHISHEK TYAGI 1923IT1200D FLIP FLOP USING NAND LATCH
D FLIP FLOP USING NAND LATCH3 X 8 DECODER
3 X 8 DECODERJk flip flop exp 12 abhishek tyagi 1923IT1200
Jk flip flop exp 12 abhishek tyagi 1923IT1200NOR Latch Abhishek tyagi exp 11
NOR Latch Abhishek tyagi exp 11EXP 16 Design of Clocked sequenctial circuit to detect 3 or more consequetive 1s
EXP 16 Design of Clocked sequenctial circuit to detect 3 or more consequetive 1sEXP 6 MULTIPLIER 2 X 2 ABHISHEK TYAGI 1923IT1200
EXP 6 MULTIPLIER 2 X 2 ABHISHEK TYAGI 1923IT1200EXP 7 (4 TO 2) ENCODER CIRCUIT ABHISHEK TYAGI1923IT1200
EXP 7 (4 TO 2) ENCODER CIRCUIT ABHISHEK TYAGI1923IT1200Exp 6 (Multiplier 2x2)abhishek tyagi 1923it1200
Exp 6 (Multiplier 2x2)abhishek tyagi 1923it1200Analysis and simulation of sequential circuit using D and JK flip flop
Analysis and simulation of sequential circuit using D and JK flip flop4X2 ENCODER, 8X3 ENCODER ABHISHEK TYAGI 1923IT1200
4X2 ENCODER, 8X3 ENCODER ABHISHEK TYAGI 1923IT1200Jk flip flop exp 12 abhishek tyagi
Jk flip flop exp 12 abhishek tyagiGray to binary code
Gray to binary codeExp 6 (Multiplier 2x2)abhishek tyagi 1923it1200
Exp 6 (Multiplier 2x2)abhishek tyagi 1923it12002 bit arithmetic logic unit
2 bit arithmetic logic unit3 Bits binary Adder
3 Bits binary Adder3 bits carry look ahead adder
3 bits carry look ahead adderUntitled
UntitledBINARY TO GRAY CODE
BINARY TO GRAY CODEbasic gates
basic gates