project.name

Daranya K

Member since: 3 years

Educational Institution: Not Entered

Country: Not Entered

BASIC PROPERTY

BASIC PROPERTY
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4 bit synchoronous up counter

4 bit synchoronous up counter
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conversion of binary code to gray code

conversion of binary code to gray code
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Conversion of Binary code to Gray code

Conversion of Binary code to Gray code
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RING COUNTER

RING COUNTER
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PARALLEL IN SERIAL OUT

PARALLEL IN SERIAL OUT
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SERIAL IN PARALLEL OUT

SERIAL IN PARALLEL OUT
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Untitled

Untitled
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SHIFT COUNTER

SHIFT COUNTER
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MOD 12 COUNTER

MOD 12 COUNTER
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4 BIT RIPPLE COUNTER

4 BIT RIPPLE COUNTER
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4 BIT RIPPLE UP COUNTER WITH DECODED OUTPUT

4 BIT RIPPLE UP COUNTER WITH DECODED OUTPUT
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4 BIT RIPPLE UP

4 BIT RIPPLE UP
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MOD 12 COUNTER

MOD 12 COUNTER
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MOD 7 COUNTER

MOD 7 COUNTER
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4 BIT SYNCHORONOUS UP/ DOWN COUNTER

4 BIT SYNCHORONOUS UP/ DOWN COUNTER
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Untitled

Untitled
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4 BIT RIPPLE UP/DOWN COUNTER

4 BIT RIPPLE UP/DOWN COUNTER
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BASIC GATES

BASIC GATES
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Commutative

Commutative
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Associative

Associative
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4 BIT RIPPLE DOWN COUNTER

4 BIT RIPPLE DOWN COUNTER
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SERIAL IN SERIAL OUT

SERIAL IN SERIAL OUT
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UnIVERSAL SHIFT RE

UnIVERSAL SHIFT RE
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adder and subtractor circuit

adder and subtractor circuit
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Distributive R.H.S.

Distributive R.H.S.
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Untitled

Untitled
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design a counter

design a counter
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4 BIT SYNCHORONOUS COUNTER

4 BIT SYNCHORONOUS COUNTER
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Untitled

Untitled
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4 bit synchoronous down counter

4 bit synchoronous down counter
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Untitled

Untitled
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UNIVERSAL SHIFT REG

UNIVERSAL SHIFT REG
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Daranya K is not a collaborator of any project.

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