Member since: 4 years
Educational Institution: Not Entered
Country: Not Entered
Truth Table for binary to gray
Truth Table for binary to graybinary to gray code VIII
binary to gray code VIIINAND using 2X1 MUX
NAND using 2X1 MUX2 to 1 MUX
2 to 1 MUXOR using 2X1 MUX
OR using 2X1 MUX4X1 MUX
4X1 MUXJK FF using logic gates
JK FF using logic gatesJK FlipFlop
JK FlipFlopSR FF
SR FFD Flip Flop
D Flip FlopD Flip Flop
D Flip FlopT FF
T FFTFF using DFF
TFF using DFFJKFF using DFF
JKFF using DFFJKFF using SRFF
JKFF using SRFFJKFF using TFF
JKFF using TFFMod 12 counter
Mod 12 counter4 bit ripple down counter
4 bit ripple down counterEXOR gate
EXOR gateEX NOR gate
EX NOR gateFULL SUBTRACTOR USING NAND
FULL SUBTRACTOR USING NANDHALF ADDER USING BASIC GATES
HALF ADDER USING BASIC GATESSR FF using logic gates
SR FF using logic gatesHALF SUBTRACTOR USING EXOR GATE
HALF SUBTRACTOR USING EXOR GATEVERIFICATION OF BOOLEAN POSTULATES AND LAWS
VERIFICATION OF BOOLEAN POSTULATES AND LAWS4 Bit Ripple Counter
4 Bit Ripple CounterTFF using SRFF
TFF using SRFFSRFF using DFF
SRFF using DFFOR gate
OR gateNAND gate
NAND gateNOT gate
NOT gateNOR gate
NOR gateTFF using JKFF
TFF using JKFFVERIFICATION OF BOOLEAN POSTULATES AND LAWS
VERIFICATION OF BOOLEAN POSTULATES AND LAWS24X1 using 8X1
24X1 using 8X1HALF SUBTRACTOR USING NAND
HALF SUBTRACTOR USING NANDFULL ADDER USING BASIC GATES
FULL ADDER USING BASIC GATESFULL ADDER USING EXOR
FULL ADDER USING EXORAND gate
AND gateHALF SUBTRACTOR USING NOR
HALF SUBTRACTOR USING NORVERIFICATION OF BOOLEAN POSTULATES AND LAWS
VERIFICATION OF BOOLEAN POSTULATES AND LAWS4 to 16 decoder
4 to 16 decoderD FF using logic gates
D FF using logic gatesT FF using logic gates
T FF using logic gates32X1 using 4X1 MUX
32X1 using 4X1 MUXVERIFICATION OF BOOLEAN POSTULATES AND LAWS
VERIFICATION OF BOOLEAN POSTULATES AND LAWSCONSENSUS THEOREM
CONSENSUS THEOREMCONSENSUS THEOREM
CONSENSUS THEOREMVERIFICATION OF BOOLEAN POSTULATES AND LAWS
VERIFICATION OF BOOLEAN POSTULATES AND LAWSVERIFICATION OF BOOLEAN POSTULATES AND LAWS
VERIFICATION OF BOOLEAN POSTULATES AND LAWS1:4 Demux
1:4 DemuxBCD to Decimal Decoder
BCD to Decimal Decoder1 : 16 Demux
1 : 16 DemuxHALF ADDER USING EXOR
HALF ADDER USING EXOROctal to Binary encoder
Octal to Binary encoderDecimal to BCD encoder
Decimal to BCD encoder4 to 2 priority encoder
4 to 2 priority encoder8 to 3 priority encoder
8 to 3 priority encoder3 to 8 decoder
3 to 8 decoder2 to 4 decoder
2 to 4 decoder1 to 2 decoder
1 to 2 decoderFULL SUBTRACTOR USING NOR
FULL SUBTRACTOR USING NORBCD to 7 segment decoder
BCD to 7 segment decoderFULL ADDER USING NAND
FULL ADDER USING NANDFULL SUBTRACTOR USING BASIC GATES
FULL SUBTRACTOR USING BASIC GATESFULL ADDER USING NOR
FULL ADDER USING NORFULL SUBTRACTOR USING EXOR
FULL SUBTRACTOR USING EXORJK FlipFlop
JK FlipFlopT FlipFlop
T FlipFlopDFF using SRFF
DFF using SRFFDFF using JKFF
DFF using JKFFHALF ADDER USING NAND GATE
HALF ADDER USING NAND GATE3 Bit parity generator
3 Bit parity generatorbcd to excess-3
bcd to excess-32 to 1 MUX
2 to 1 MUX3-bit parity checker
3-bit parity checkerNOT using 2 to 1 MUX
NOT using 2 to 1 MUXNAND based SR FF
NAND based SR FF8X1 MUX
8X1 MUXExcess-3 to BCD
Excess-3 to BCD1:8 Demux
1:8 Demux4 X 2 encoder
4 X 2 encoder4 bit parity generator
4 bit parity generator4-bit ripple up/down counter
4-bit ripple up/down counterSR FF using logic gates
SR FF using logic gates4 bit ripple counter with decoded outputs
4 bit ripple counter with decoded outputsSRFF using JKFF
SRFF using JKFFTruth table for bcd to excess -3converter
Truth table for bcd to excess -3converterNOR using 2X1 MUX
NOR using 2X1 MUXUntitled
Untitled2 bit magnitude comparator
2 bit magnitude comparatorSRFF using TFF
SRFF using TFF16X1 MUX
16X1 MUXGray to Binary code VIII
Gray to Binary code VIIINOR based SR FF
NOR based SR FF1 bit magnitude comparator
1 bit magnitude comparator1 to 2 Demux
1 to 2 DemuxHALF ADDER USING NOR GATE
HALF ADDER USING NOR GATE2X1 encoder
2X1 encoder