Dhivyarupini M
Member since: 4 years
Educational Institution: Not Entered
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sequence generator using counter
sequence generator using counter
4 BIT RIPPLE COUNTER
4 BIT RIPPLE COUNTER
NOR BASED SR FLIPFLOP
NOR BASED SR FLIPFLOP
DFF USING JKFF
DFF USING JKFF
TFF
TFF
JK FLIPFLOP
JK FLIPFLOP
D FLIPFLOP
D FLIPFLOP
TFF USING JKFF
TFF USING JKFF
JKFF using SRFF
JKFF using SRFF
SRFF USING TFF
SRFF USING TFF
PARRALLEL IN PARALLEL OUT
PARRALLEL IN PARALLEL OUT
BCD ADDER
BCD ADDER
synchronous up counter
synchronous up counter
4 bit ripple up/down counter
4 bit ripple up/down counter
parrallel in parallel out
parrallel in parallel out
4- BIT MAGNITUDE COMPARATOR
4- BIT MAGNITUDE COMPARATOR
sequence generator using counter
sequence generator using counter
mod-6 unit distance counter
mod-6 unit distance counter
Decimal to BCD Encoder
Decimal to BCD Encoder
Ripple carry Adder
Ripple carry Adder
RIPPLE CARRY SUBTRACTOR
RIPPLE CARRY SUBTRACTOR
1 to 16 DEMUX
1 to 16 DEMUX
1 to 8 DEMUX
1 to 8 DEMUX
Untitled
Untitled
Untitled
Untitled
Untitled
Untitled
NAND BASED SR FLIPFLOP
NAND BASED SR FLIPFLOP
AND GATE UNDER CIRCUIT ELEMENTS
AND GATE UNDER CIRCUIT ELEMENTS
Decimal to BCD Encoder
Decimal to BCD Encoder
TFF USING SRFF
TFF USING SRFF
JK FLIPFLOP
JK FLIPFLOP
1 to 16 DEMUX
1 to 16 DEMUX
4 bit ripple counter with decoded outputs
4 bit ripple counter with decoded outputs
JKFF Using TFF
JKFF Using TFF
4 to 2 priority encoder
4 to 2 priority encoder
counter that counts 0,2,4,7,0
counter that counts 0,2,4,7,0
SR FLIPFLOP
SR FLIPFLOP
3 BIT PARALLEL MULTIPLIER
3 BIT PARALLEL MULTIPLIER
SERIAL IN PARALLEL OUT
SERIAL IN PARALLEL OUT
JKFF USING DFF
JKFF USING DFF
JKFF Using TFF
JKFF Using TFF
JKFF Using TFF
JKFF Using TFF
SYNCHRONOUS UP/DOWN COUNTER
SYNCHRONOUS UP/DOWN COUNTER
4-bit bidirectional shift register
4-bit bidirectional shift register
4 BIT RIPPLE DOWN COUNTER
4 BIT RIPPLE DOWN COUNTER
MOD 12 COUNTER
MOD 12 COUNTER
4 BIT PARALLEL ADDER/SUBTRACTOR
4 BIT PARALLEL ADDER/SUBTRACTOR
3 BIT PARITY GENERATOR AND CHECKER
3 BIT PARITY GENERATOR AND CHECKER
MOD 7 COUNTER
MOD 7 COUNTER
T FLIPFLOP
T FLIPFLOP
NOR BASED SR FLIPFLOP
NOR BASED SR FLIPFLOP
SRFF USING JKFF
SRFF USING JKFF
SRFF using DFF
SRFF using DFF
Parallel in serial out
Parallel in serial out
RIPPLE CARRY SUBTRACTOR
RIPPLE CARRY SUBTRACTOR
SRFF using DFF
SRFF using DFF
implementation of full adder using counter
implementation of full adder using counter
synchronous down counter
synchronous down counter
Octal to Binary Encoder
Octal to Binary Encoder
implementation of full adder with mux and counter
implementation of full adder with mux and counter
3 BIT PARALLEL MULTIPLIER
3 BIT PARALLEL MULTIPLIER
4 BIT UNIVERSAL SHIFT REGISTER
4 BIT UNIVERSAL SHIFT REGISTER
TFF USING DFF
TFF USING DFF
4 bir adder/subtractor
4 bir adder/subtractor
BCD ADDER
BCD ADDER
Untitled
Untitled
implementation of full adder with mux and counter
implementation of full adder with mux and counter
DFF USING TFF
DFF USING TFF
4 bit ripple counter with decoded outputs
4 bit ripple counter with decoded outputs
4 BIT PARALLEL ADDER/SUBTRACTOR
4 BIT PARALLEL ADDER/SUBTRACTOR
implementation of full adder with mux and counter
implementation of full adder with mux and counter
3 x 8 DECODER
3 x 8 DECODER
SISO
SISO
1 to 4 DEMUX
1 to 4 DEMUX
SERIAL IN SERIAL OUT
SERIAL IN SERIAL OUT
implementation of full adder with mux and counter
implementation of full adder with mux and counter
Ripple carry Adder
Ripple carry Adder
DFF USING SRFF
DFF USING SRFF
4 BIT PARALLEL ADDER/SUBTRACTOR
4 BIT PARALLEL ADDER/SUBTRACTOR
circuit that counts (0,2,4...14)when input is 1 and counts (1,3...15)when input is 0
circuit that counts (0,2,4...14)when input is 1 and counts (1,3...15)when input is 0
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