project.name

Dhivyarupini M

Member since: 4 years

Educational Institution: Not Entered

Country: Not Entered

sequence generator using counter

sequence generator using counter
Public
project.name

4 BIT RIPPLE COUNTER

4 BIT RIPPLE COUNTER
Public
project.name

NOR BASED SR FLIPFLOP

NOR BASED SR FLIPFLOP
Public
project.name

DFF USING JKFF

DFF USING JKFF
Public
project.name

TFF

TFF
Public
project.name

JK FLIPFLOP

JK FLIPFLOP
Public
project.name

D FLIPFLOP

D FLIPFLOP
Public
project.name

TFF USING JKFF

TFF USING JKFF
Public
project.name

JKFF using SRFF

JKFF using SRFF
Public
project.name

SRFF USING TFF

SRFF USING TFF
Public
project.name

PARRALLEL IN PARALLEL OUT

PARRALLEL IN PARALLEL OUT
Public
project.name

BCD ADDER

BCD ADDER
Public
project.name

synchronous up counter

synchronous up counter
Public
project.name

4 bit ripple up/down counter

4 bit ripple up/down counter
Public
project.name

parrallel in parallel out

parrallel in parallel out
Public
project.name

4- BIT MAGNITUDE COMPARATOR

4- BIT MAGNITUDE COMPARATOR
Public
project.name

sequence generator using counter

sequence generator using counter
Public
project.name

mod-6 unit distance counter

mod-6 unit distance counter
Public
project.name

Decimal to BCD Encoder

Decimal to BCD Encoder
Public
project.name

Ripple carry Adder

Ripple carry Adder
Public
project.name

RIPPLE CARRY SUBTRACTOR

RIPPLE CARRY SUBTRACTOR
Public
project.name

1 to 16 DEMUX

1 to 16 DEMUX
Public
project.name

1 to 8 DEMUX

1 to 8 DEMUX
Public
project.name

Untitled

Untitled
Public
project.name

Untitled

Untitled
Public
project.name

Untitled

Untitled
Public
project.name

NAND BASED SR FLIPFLOP

NAND BASED SR FLIPFLOP
Public
project.name

AND GATE UNDER CIRCUIT ELEMENTS

AND GATE UNDER CIRCUIT ELEMENTS
Public
project.name

Decimal to BCD Encoder

Decimal to BCD Encoder
Public
project.name

TFF USING SRFF

TFF USING SRFF
Public
project.name

JK FLIPFLOP

JK FLIPFLOP
Public
project.name

1 to 16 DEMUX

1 to 16 DEMUX
Public
project.name

4 bit ripple counter with decoded outputs

4 bit ripple counter with decoded outputs
Public
project.name

JKFF Using TFF

JKFF Using TFF
Public
project.name

4 to 2 priority encoder

4 to 2 priority encoder
Public
project.name

counter that counts 0,2,4,7,0

counter that counts 0,2,4,7,0
Public
project.name

SR FLIPFLOP

SR FLIPFLOP
Public
project.name

3 BIT PARALLEL MULTIPLIER

3 BIT PARALLEL MULTIPLIER
Public
project.name

SERIAL IN PARALLEL OUT

SERIAL IN PARALLEL OUT
Public
project.name

JKFF USING DFF

JKFF USING DFF
Public
project.name

JKFF Using TFF

JKFF Using TFF
Public
project.name

JKFF Using TFF

JKFF Using TFF
Public
project.name

SYNCHRONOUS UP/DOWN COUNTER

SYNCHRONOUS UP/DOWN COUNTER
Public
project.name

4-bit bidirectional shift register

4-bit bidirectional shift register
Public
project.name

4 BIT RIPPLE DOWN COUNTER

4 BIT RIPPLE DOWN COUNTER
Public
project.name

MOD 12 COUNTER

MOD 12 COUNTER
Public
project.name

4 BIT PARALLEL ADDER/SUBTRACTOR

4 BIT PARALLEL ADDER/SUBTRACTOR
Public
project.name

3 BIT PARITY GENERATOR AND CHECKER

3 BIT PARITY GENERATOR AND CHECKER
Public
project.name

MOD 7 COUNTER

MOD 7 COUNTER
Public
project.name

T FLIPFLOP

T FLIPFLOP
Public
project.name

NOR BASED SR FLIPFLOP

NOR BASED SR FLIPFLOP
Public
project.name

SRFF USING JKFF

SRFF USING JKFF
Public
project.name

SRFF using DFF

SRFF using DFF
Public
project.name

Parallel in serial out

Parallel in serial out
Public
project.name

circuit that counts (0,2,4...14)when input is 1 and counts (1,3...15)when input is 0

circuit that counts (0,2,4...14)when input is 1 and counts (1,3...15)when input is 0
Public
project.name

RIPPLE CARRY SUBTRACTOR

RIPPLE CARRY SUBTRACTOR
Public
project.name

SRFF using DFF

SRFF using DFF
Public
project.name

implementation of full adder using counter

implementation of full adder using counter
Public
project.name

synchronous down counter

synchronous down counter
Public
project.name

Octal to Binary Encoder

Octal to Binary Encoder
Public
project.name

implementation of full adder with mux and counter

implementation of full adder with mux and counter
Public
project.name

3 BIT PARALLEL MULTIPLIER

3 BIT PARALLEL MULTIPLIER
Public
project.name

4 BIT UNIVERSAL SHIFT REGISTER

4 BIT UNIVERSAL SHIFT REGISTER
Public
project.name

TFF USING DFF

TFF USING DFF
Public
project.name

4 bir adder/subtractor

4 bir adder/subtractor
Public
project.name

BCD ADDER

BCD ADDER
Public
project.name

Untitled

Untitled
Public
project.name

implementation of full adder with mux and counter

implementation of full adder with mux and counter
Public
project.name

DFF USING TFF

DFF USING TFF
Public
project.name

4 bit ripple counter with decoded outputs

4 bit ripple counter with decoded outputs
Public
project.name

4 BIT PARALLEL ADDER/SUBTRACTOR

4 BIT PARALLEL ADDER/SUBTRACTOR
Public
project.name

implementation of full adder with mux and counter

implementation of full adder with mux and counter
Public
project.name

3 x 8 DECODER

3 x 8 DECODER
Public
project.name

SISO

SISO
Public
project.name

1 to 4 DEMUX

1 to 4 DEMUX
Public
project.name

SERIAL IN SERIAL OUT

SERIAL IN SERIAL OUT
Public
project.name

implementation of full adder with mux and counter

implementation of full adder with mux and counter
Public
project.name

Ripple carry Adder

Ripple carry Adder
Public
project.name

DFF USING SRFF

DFF USING SRFF
Public
project.name

4 BIT PARALLEL ADDER/SUBTRACTOR

4 BIT PARALLEL ADDER/SUBTRACTOR
Public
project.name
No result image
Dhivyarupini M doesn't have any favourites.
No result image
Dhivyarupini M is not a collaborator of any project.