project.name

5043 SANJANA L

Member since: 3 years

Educational Institution: R.M.K.ENGINEERING COLLEGE

Country: India

5043 SANJANA L/Ex.3 Design of Adder and Subtractor

5043 SANJANA L/Ex.3 Design of Adder and Subtractor
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MULTIPLEXER

MULTIPLEXER
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5043 SANJANA L/Ex.9 Design and Implementation of Shift register

5043 SANJANA L/Ex.9 Design and Implementation of Shift register
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5043 SANJANA L/Ex.8 Study of Flip-Flops

5043 SANJANA L/Ex.8 Study of Flip-Flops
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5043 SANJANA L/Ex.9

5043 SANJANA L/Ex.9
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4 BIT 2'S COMPLEMENT

4 BIT 2'S COMPLEMENT
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5043 SANJANA L/Ex.7 Design of Adder/Subtractor using MUX

5043 SANJANA L/Ex.7 Design of Adder/Subtractor using MUX
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5043 SANJANA L/Ex.11 Design and Implementation of Binary Synchronous Counter

5043 SANJANA L/Ex.11 Design and Implementation of Binary Synchronous Counter
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5043 SANJANA L/Ex.4 Design of Code Convertors

5043 SANJANA L/Ex.4 Design of Code Convertors
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Serial in serial out

Serial in serial out
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BINARY CODE TO EXCESS-3 CODE

BINARY CODE TO EXCESS-3 CODE
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boolean theorm

boolean theorm
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5043 SANJANA L/ EX.10 Design and implementation OF 4-Bit Binary Ripple Counter, Mod -10 and Mod-12 Ripple Counter

5043 SANJANA L/ EX.10 Design and implementation OF 4-Bit Binary Ripple Counter, Mod -10 and Mod-12 Ripple Counter
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FLIP FLOP

FLIP FLOP
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5043 SANJANA L/Ex.5 Design of Odd/Even Parity Checker-Generator

5043 SANJANA L/Ex.5 Design of Odd/Even Parity Checker-Generator
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5043 SANJANA L/Ex.2 Verification of Boolean laws and Theorems

5043 SANJANA L/Ex.2 Verification of Boolean laws and Theorems
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