project.name

SELVAGANAPATHY A

Member since: 3 years

Educational Institution: RMK ENGINEERING COLLEGE

Country: Not Entered

mod 12 counter

mod 12 counter
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Boolean Theorems

Boolean Theorems
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Parallel in parallel out

Parallel in parallel out
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Untitled

Untitled
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Sipo

Sipo
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SISO

SISO
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mod 10 counter

mod 10 counter
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4-Bit ripple counter

4-Bit ripple counter
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Parity Generators/Checkers

Parity Generators/Checkers
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4 bit binary subtractor

4 bit binary subtractor
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Boolean Theorems

Boolean Theorems
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Verification of Boolean Theorems

Verification of Boolean Theorems
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4-bit Magnitude comparator

4-bit Magnitude comparator
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gowt

gowt
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FULL ADDER USING MUX

FULL ADDER USING MUX
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logicgates

logicgates
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4 BIT synchronous counter

4 BIT synchronous counter
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Binary to grey and grey to binary

Binary to grey and grey to binary
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4 bit binary adder

4 bit binary adder
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BCD to Excess 3

BCD to Excess 3
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Parallel in serial out

Parallel in serial out
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FULL SUBTRACTOR USING MUX

FULL SUBTRACTOR USING MUX
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Exercise - 3 Adders and Subtractors

Exercise - 3 Adders and Subtractors
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BCD to Excess 3

BCD to Excess 3
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FLIP FLOP

FLIP FLOP
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2 BIT MAGNITUDE COMPARATOR

2 BIT MAGNITUDE COMPARATOR
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BCD to EXCESS 3

BCD to EXCESS 3
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BCD to Excess 3

BCD to Excess 3
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SELVAGANAPATHY A is not a collaborator of any project.

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