project.name

5039 PRIYA M

Member since: 4 years

Educational Institution: Not Entered

Country: Not Entered

Design of Adder/Subtractor using MUX

Design of Adder/Subtractor using MUX
Public
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cycle 2-study of flip flops

cycle 2-study of flip flops
Public
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CYCLE 2 (BCD)

CYCLE 2 (BCD)
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parallel in serial out -parallel in parallel out

parallel in serial out -parallel in parallel out
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BINARY UP-DOWN COUNTER

BINARY UP-DOWN COUNTER
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4-bit binary adder/subtractor

4-bit binary adder/subtractor
Public
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serial in serial out and serial in parallel out

serial in serial out and serial in parallel out
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ADDERS

ADDERS
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4 Bit Magnitude Comparator

4 Bit Magnitude Comparator
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BIT BINARY

BIT BINARY
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Odd/Even parity generator and checker

Odd/Even parity generator and checker
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4bit magnitude comparator

4bit magnitude comparator
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logic gates

logic gates
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laws

laws
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implementation of full adder using NAND gates

implementation of full adder using NAND gates
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binary to gray and gray to binary

binary to gray and gray to binary
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CYCLE 2

CYCLE 2
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half and full adder/subtractor

half and full adder/subtractor
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4 BIT SUBTRACTOR

4 BIT SUBTRACTOR
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4bits-2's complement

4bits-2's complement
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4 Bit Binary Adder/subtractor

4 Bit Binary Adder/subtractor
Public
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Implementation of full adder using logic circuit

Implementation of full adder using logic circuit
Public
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