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5022 Maaz Hussain

Member since: 4 years

Educational Institution: Not Entered

Country: Not Entered

Experiment-2

Experiment-2
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Parallel in serial out

Parallel in serial out
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4-bit parallel adder/subtractor

4-bit parallel adder/subtractor
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4 bit binary adder

4 bit binary adder
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Priority Encoder/ Decoder

Priority Encoder/ Decoder
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Full Adder

Full Adder
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Boolean Theorems

Boolean Theorems
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LOGIC GATES

LOGIC GATES
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Exercise - 3 Adders and Subtractors

Exercise - 3 Adders and Subtractors
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JK Flip Flop

JK Flip Flop
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MultiPlexers

MultiPlexers
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Demultiplexers

Demultiplexers
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4 bit binary subtractor

4 bit binary subtractor
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4-bit Magnitude comparator

4-bit Magnitude comparator
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Parallel in parallel out

Parallel in parallel out
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Parity Generators/Checkers

Parity Generators/Checkers
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Ripple Counter(MOD 10-12)

Ripple Counter(MOD 10-12)
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4-bit adder subtractor

4-bit adder subtractor
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4 BIT SUBTRACTOR

4 BIT SUBTRACTOR
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4 bit binary adder

4 bit binary adder
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FULL SUBTRACTOR USING MUX

FULL SUBTRACTOR USING MUX
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Binary to grey and grey to binary

Binary to grey and grey to binary
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Experiment-2

Experiment-2
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COMBINATIONAL CIRCUIT

COMBINATIONAL CIRCUIT
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FLIP FLOP

FLIP FLOP
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Untitled

Untitled
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HalfAdder

HalfAdder
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HalfAdder_NAND

HalfAdder_NAND
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JK Flip Flop

JK Flip Flop
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FLIP FLOP

FLIP FLOP
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Expt No. 10 (Part 2)-Construction and verification of 4-bit ripple counter and Mod-10 / Mod-12 Ripple counters

Expt No. 10 (Part 2)-Construction and verification of 4-bit ripple counter and Mod-10 / Mod-12 Ripple counters
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FULL ADDER USING MUX

FULL ADDER USING MUX
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FLIP FLOP

FLIP FLOP
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FLIP FLOP

FLIP FLOP
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EXPERIMENT 1

EXPERIMENT 1
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COMBINATIONAL CIRCUIT

COMBINATIONAL CIRCUIT
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Adders

Adders
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