5038 Prajeshwar Varadharajan
Member since: 4 years
Educational Institution: Not Entered
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full Adder
full Adder
Associative Law
Associative Law
EXAM
EXAM
FLIP FLOP
FLIP FLOP
JK Flip Flop
JK Flip Flop
encoders
encoders
MultiPlexers
MultiPlexers
Demultiplexers
Demultiplexers
Parity Generators/Checkers
Parity Generators/Checkers
Demultiplexers
Demultiplexers
Parity Generators/Checkers
Parity Generators/Checkers
Full adder 4x1 MUX
Full adder 4x1 MUX
Priority Encoder/ Decoder
Priority Encoder/ Decoder
Ripple Counter(MOD 10-12)
Ripple Counter(MOD 10-12)
4-Bit Adder
4-Bit Adder
4-bit parallel adder/subtractor
4-bit parallel adder/subtractor
Priority Encoder/ Decoder
Priority Encoder/ Decoder
Expt No. 10 (Part 2)-Construction and verification of 4-bit ripple counter and Mod-10 / Mod-12 Ripple counters
Expt No. 10 (Part 2)-Construction and verification of 4-bit ripple counter and Mod-10 / Mod-12 Ripple counters
Multiplexers and demultiplexers
Multiplexers and demultiplexers
gowt
gowt
4-bit Magnitude comparator
4-bit Magnitude comparator
5029Nithishkumar/Exercise-2 verification of Boolean laws
5029Nithishkumar/Exercise-2 verification of Boolean laws
logic gates
logic gates
HalfAdder_NAND
HalfAdder_NAND
Verification of Boolean Theorems
Verification of Boolean Theorems
MultiPlexers
MultiPlexers
Experiment-2
Experiment-2
Binary to grey and grey to binary
Binary to grey and grey to binary
ASS 1 : half adder and full adder
ASS 1 : half adder and full adder
Logic gates
Logic gates
4 bit binary subtractor
4 bit binary subtractor
Prajeshwar V ex-3
Prajeshwar V ex-3
Digital Sequencial circuits
Digital Sequencial circuits
Experiment -2(A)
Experiment -2(A)
COMBINATIONAL CIRCUIT
COMBINATIONAL CIRCUIT
FULL ADDER USING 8 TO 1 MUX
FULL ADDER USING 8 TO 1 MUX
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