4 bit ripple counter

4 BIT PARITY CHECKER 3

16 TO 1 MUX

2 BIT MAGNITUDE COMPARATOR 3

FULLL ADDER WITH MUX AND COUNTER

3 BIT PARITY GENERATOR 1

4 TO 16 DECODER(7)

4 TO 16 DECODER(2)

4 TO 16 DECODER(1)

4 TO 16 DECODER(6)

BASIC ADDERS

4 BIT RIPPLE CARRY ADDER 1

2 TO 1 MUX(EXOR)

I AS SUBTRACTOR

II AS ADDER

I AS ADDER

4 BIT PARITY GENERATOR 4

BINARY TO GRAY CODER TRUTH TABLE

4 BIT BINARY TO GRAY CODER 1

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4 BIT BINARY TO GRAY CODER 3

BCD TO EXCESS-3 CONVERTER 3

4 BIT GRAY CODER TO BINARY 1

4 BIT GRAY CODE TO BINARY 2

BCD TO EXCESS-3 CONVERTER 2

BCD TO EXCESS 3 CONVERTER 1

EXCESS-3 TO BCD 2

EXCESS-3 TO BCD 3

EXCESS-3 TO BCD 4

EXCESS-3 TO BCD 5

4 BIT PARITY CHECKER 1

4 BIT PARITY CHECKER 5

4 BIT PARITY CHECKER 7

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SERIAL IN SERIAL OUT

SHIFT COUNTER

PARALLEL IN SERIAL OUT

JK FLIP FLOP(1)

SR FLIP FLOP(NOR BASED)1

JK FLIP FLOP

S R FLIP FLOP (NOR BASED)2

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NAND BASED SR FLIP FLOP2

TFF USING SRFF

TFF USING JKFF

SRFF USING DFF

SRFF USING JKFF

JKFF USING TFF

SRFF USING TFF

JK FLIP FLOP(2)

4 BIT RIPPLE COUNTER WITH DECODED OUTPUTS

2 BIT MAGNITUDE COMPARATOR 4

4 BIT BINARY TO GRAY CODER 1

EXCESS-3 TO BCD 1

DISTRIBUTIVE PROPERTY A.(B+C) = A.B+A.C

4 TO 16 DECODER(4)

ABSORPTION LAW

HALF ADDER USING NAND GATE

DISTRIBUTIVE PROPERTY A+BC = (A+B)(A+C)

OCTAL TO BINARY(2)

4 BIT BINARY TO GRAY CODER 2

IMPLEMENTATION OF MINTERMS USING 4 TO 1 MUX

RING COUNTER

ASSOCIATIVE PROPERTY A*(B*C) = (A*B)*C

4 BIT SYNCHRONOUS COUNTERS

8 TO 1 MUX (1)

2X1 ENCODER

FULL SUBTRACTOR USING XOR GATE

CONSENSUS THEOREM

4 TO 2 PARITY ENCODER(4)

4 TO 1 MUX

16x1 MUX

NAND BASED SR FLIP FLOP1

DECIMAL TO BCD ENCODER(1)

1 BIT MAGNITUDE COMPARATOR 2

FULL ADDER USING NOR GATE

BCD

4 BIT GRAY CODER TO BINARY TRUTH TABLE

4 BIT SYNCHRONOUS UP COUNTER

4 BIT SYNCHRONOUS DOWN COUNTER

4 BIT SYNCHRONOUS UP/DOWN COUNTER

4 BIT PARITY CHECKER 6

CONSENSUS THEOREM

COMMUTATIVE LAW A*B = B*A

2 to 1 MUX(NOT)

2 BIT MAGNITUDE COMPARATOR 6

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8 TO 3 PARITY ENCODER(5)

BCD ADDER 1

2 TO 1 MUX (AND)

DELAY FLIP FLOP INBUILT

DFF USING SR FLIP FLOP

8 TO 1 MUX (3)

8 TO 1 MUX (4)

2 TO 1 MUX(NAND)

HALF SUBTRACTOR USING BASIC GATES

FULL SUBTRACTOR USING NOR GATE

HALF SUBTRACTOR USING NOR GATE

ABSORPTION LAW

2 to 1 MUX (OR)

2 TO 1 MUX(NOR)

24 TO 1 MUX USING 8 TO 1 MUX

2 BIT MAGNITUDE COMPARATOR 7

2 BIT MAGNITUDE COMPARATOR 8

IMPLEMENTATION OF MINTERMS USING 8 TO 1 MUX

1:2 DEMUX

1:4 DEMUX(1)

1:8 DEMUX(2)

1:8 DEMUX(4)

4 BIT RIPPLE DOWN COUNTER

2 BIT SERIAL IN AND PARALLEL OUT(SIPO)

4 TO 2 PARITY ENCODER(2)

4 TO 2 PARITY ENCODER(3)

3 TO 8(3)

FULL SUBTRACTOR USING BASIC GATES

HALF SUBTRACTOR USING XOR GATE

3 TO 8(2)

3 TO 8(3)

1 TO 2 DECODER

BCD TO DECIMAL DECODER 5

BCD TO DECIMAL DECODER 4

BCD TO DECIMAL DECODER 5

1:16 DEMUX(4)

3 BIT PARITY CHECKER 1

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FULL ADDDER USING XOR GATE

HALF ADDER USING XOR GATE

FULL ADDER USING BASIC GATES

FULL SUBTRACTOR USING NAND GATE

1:16 DEMUX(2)

1:16 DEMUX(3)

16 TO 1 MUX(8)

16 TO 1 MUX(3)

16 TO 1 MUX(2)

16 TO 1 MUX(4)

4X2 ENCODER

DECIMAL TO BCD ENCODER(2)

OCTAL TO BINARY(1)

DECIMAL TO BCD ENCODER(3)

DECIMAL TO BCD ENCODER(4)

8 TO 1 MUX (2)

4 BIT PARITY CHECKER 8

16 TO 1 MUX(2)

TFF USING DFF

1:8 DEMUX(1)

1:8 DEMUX(3)

1:16 DEMUX

1 BIT PARALLEL INPUT AND OUTPUT

HALF ADDER USING NOR GATE

32 TO 1 MUX USING 4 TO 1 MUX

1:16 DEMUX(1)

4 BIT PARALLEL IN PARALLEL OUT

JKFF USING SRFF

BCD TO DECIMAL DECODER 3

BCD TO DECIMAL DECODER 2

ABSORPTION LAW

BCD TO 7 SEGMENT DECODER 7

3 BIT PARITY CHECKER 3

FULL ADDER USING NAND GATE

4 BIT RIPPLE CARRY SUBTRACTOR 1

4 BIT RIPPLE CARRY SUBTRACTOR 2

II AS SUBTRACTOR

3 BIT PARALLEL MULTIPLIER 1

2 BIT MAGNITUDE COMPARATOR 2

2 BIT MAGNITUDE COMPARATOR 5

3 BIT PARITY CHECKER 4

3 BIT PARITY CHECKER 2

4 BIT PARITY GENERATOR 2

4 BIT PARITY CHECKER 2

UNIVERSAL SHIFT REGISTER

HALF SUBTRACTOR USING NAND GATE

TOGGLE FLIP FLOP

STIMULATE AND, OR, EXOR, NAND, NOR, Ex-NOR, NOT GATES

Simulate AND, OR, EXOR, NAND, NOR, Ex-NOR, NOT gate

HALF ADDER USING BASIC GATES

TOGGLE FLIP FLOP INBUILT

SR FLIP FLOP

4 BIT RIPPLE UP/DOWN COUNTER

MOD 7 COUNTER

1 BIT MAGNITUDE COMPARATOR 1

1:4 DEMUX(2)

BCD ADDER 2

3 BIT PARALLEL MULTIPLIER 2

4 BIT PARITY CHECKER 4

4 TO 16 DECODER(3)

4 TO 16 DECODER(5)

2 to 1 MUX

4 BIT PARITY GENERATOR 3

2 to 1 MUX

IMPLEMENTATION OF MINTERMS USING 8 TO 1 MUX

2 BIT MAGNITUDE COMPARATOR 1

3 BIT PARITY GENERATOR 2

COMMUTATIVE PROPERTY A+B = B+A AND ASSOCIATIVE PROPERTY A+(B+C) = (A+B)+C

BCD TO EXCESS-3 TRUTH TABLE

4 TO 2 PARITY ENCODER(4)

DELAY FLIP FLOP

DFF USING TFF

BCD TO EXCESS-3 CONVERTER 4

IMPLEMENTATION OF MINTERMS USING 2 TO 1 MUX

STIMULATE AND, OR, EXOR, NAND, NOR, Ex-NOR, NOT GATES

4 TO 16 DECODER(8)

COMMUTATIVE PROPERTY A+B = B+A AND ASSOCIATIVE PROPERTY A+(B+C) = (A+B)+C

4 BIT RIPPLE CARRY ADDER 2

2 to 4 DECODER

JKFF USING DFF

DFF USING JKFF

4 BIT SERIAL IN PARALLEL OUT

BCD TO EXCESS-3 CONVERTER 3.1

4 BIT PARITY GENERATOR 1

4 BIT RIPPLE CARRY ADDER 3

4 BIT GRAY CODER TO BINARY 3

MOD 12 COUNTER

16DEMUX