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Aryan Pareek

Member since: 4 years

Educational Institution: Techno India University

Country: India

Full Adder Circuit

Full Adder Circuit
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BCD to XS-3

BCD to XS-3
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XS-3 to BCD

XS-3 to BCD
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Half-subtractor (non-universal gates)

Half-subtractor (non-universal gates)
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Full Subtractor

Full Subtractor
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4 bit Gray to binary

4 bit Gray to binary
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Binary to Gray Code

Binary to Gray Code
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XOR Gate 191001001166

XOR Gate 191001001166
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191001001166 XNOR using NAND

191001001166 XNOR using NAND
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4 bit Binary to Gray Code Converter

4 bit Binary to Gray Code Converter
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Boolean function using 4x1 Multiplexer

Boolean function using 4x1 Multiplexer
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Two circuits for XOR using NOR Gate

Two circuits for XOR using NOR Gate
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Half-subtractor

Half-subtractor
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Design of Combinational Circuit To Drive Seven-Segment Display

Design of Combinational Circuit To Drive Seven-Segment Display
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XNOR Gate 191001001166

XNOR Gate 191001001166
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191001001166 XNOR using NOR

191001001166 XNOR using NOR
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Half Adder using XOR, AND gates

Half Adder using XOR, AND gates
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Gray Code to Binary

Gray Code to Binary
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XOR using NAND Gate 191001001166

XOR using NAND Gate 191001001166
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Implement a 2 TO 4 DECODER as a 1×4 DE-MULTIPLEXER

Implement a 2 TO 4 DECODER as a 1×4 DE-MULTIPLEXER
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2 4x1 MUX to make a 8x1 MUX

2 4x1 MUX to make a 8x1 MUX
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4x1 Multiplexer

4x1 Multiplexer
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NAND Gate as a Universal Gate Computer Organization Lab.

NAND Gate as a Universal Gate Computer Organization Lab.
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1-Bit Comparator Circuit

1-Bit Comparator Circuit
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Half Adder using only NAND Gate

Half Adder using only NAND Gate
Public
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1-bit comparator circuit using only NAND Gates.

1-bit comparator circuit using only NAND Gates.
Public
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NOR Gate 191001001166

NOR Gate 191001001166
Public
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1-bit comparator circuit using only NAND Gates.

1-bit comparator circuit using only NAND Gates.
Public
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1-Bit Comparator Circuit

1-Bit Comparator Circuit
Public
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Aryan Pareek is not a collaborator of any project.