project.name

4127 SAI SIDDHARDHA NARISETTY

Member since: 3 years

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sipo

sipo
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bcd to grey code

bcd to grey code
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grey to binary

grey to binary
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excess3 to bcd

excess3 to bcd
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main

main
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Full Subtractor

Full Subtractor
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odd parity generator

odd parity generator
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odd parity generator

odd parity generator
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odd parity checker

odd parity checker
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multiplexer

multiplexer
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demultiplexer

demultiplexer
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Associative laws of Boolean Algebra

Associative laws of Boolean Algebra
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Distributive Laws of Boolean Algebra

Distributive Laws of Boolean Algebra
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BCD TO GRAY CODE

BCD TO GRAY CODE
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bcd to excess3

bcd to excess3
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Full Adder

Full Adder
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demorgans

demorgans
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Serial In Serial Out Shift Register - D flip flop

Serial In Serial Out Shift Register - D flip flop
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4-Bit Synchronous Down Counter

4-Bit Synchronous Down Counter
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VERIFICATION OF BOOLEAN THEOREMS USING DIGITAL LOGIC GATES

VERIFICATION OF BOOLEAN THEOREMS USING DIGITAL LOGIC GATES
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4127 SAI SIDDHARDHA NARISETTY is not a collaborator of any project.

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