project.name

lavanya

Member since: 3 years

Educational Institution: Not Entered

Country: Not Entered

ring counter t flipflop

ring counter t flipflop
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2 bit synchronus up counter

2 bit synchronus up counter
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SR-JK

SR-JK
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SR-T

SR-T
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JK-SR

JK-SR
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JK-D

JK-D
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jk to t

jk to t
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D-T

D-T
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ring counter

ring counter
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T-D

T-D
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t to jk

t to jk
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sequential circuit design

sequential circuit design
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mod7 synchronus counter

mod7 synchronus counter
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andgate

andgate
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1 bit comparitor

1 bit comparitor
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4 : 1 multiplexer

4 : 1 multiplexer
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sr-latch

sr-latch
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synchronus decade counter

synchronus decade counter
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Untitled

Untitled
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counter

counter
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D-SR

D-SR
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Multiplexer And De-Multiplexer

Multiplexer And De-Multiplexer
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ring counter

ring counter
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3 bit synchronus up counter(d flipflop)

3 bit synchronus up counter(d flipflop)
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Comparater

Comparater
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ripple counter

ripple counter
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0-1-3-4-6-0 synchronus counter

0-1-3-4-6-0 synchronus counter
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SR-D

SR-D
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Untitled

Untitled
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fulladder_nand

fulladder_nand
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1-2-4-6-7-1 synchronus counter-avoid lockout

1-2-4-6-7-1 synchronus counter-avoid lockout
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mod 4

mod 4
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lavanya is not a collaborator of any project.

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