Chirag Varshney - Circuits

Chirag Varshney

Member since: 4 years

Educational Institution: Not Entered

Country: Not Entered

Experiment 10

Experiment 10

Public

project.name

Exp 13(a)

Exp 13(a)

Public

project.name

JK flipflop

JK flipflop

Public

project.name

Chirag

Chirag

Public

project.name

Experiment 8(a)

Experiment 8(a)

Public

project.name

Experiment 8(b)

Experiment 8(b)

Public

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Experiment 7

Experiment 7

Public

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Experiment 9

Experiment 9

Public

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Experiment 5

Experiment 5

Public

project.name

SR Using NOR

SR Using NOR

Public

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SR Latch

SR Latch

Public

project.name

D Latch Using NOR

D Latch Using NOR

Public

project.name

D Latch

D Latch

Public

project.name

1*16 demux

1*16 demux

Public

project.name

T flipflop

T flipflop

Public

project.name

Experiment 15

Experiment 15

Public

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Experiment 11

Experiment 11

Public

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arithmetic unit

arithmetic unit

Public

project.name

Exp 13(b)

Exp 13(b)

Public

project.name

Internal Assessment

Internal Assessment

Public

project.name

Untitled

Untitled

Public

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chirag

chirag

Public

project.name

3-Bit Parallel Binary Adder/Subtractor

3-Bit Parallel Binary Adder/Subtractor

Public

project.name

Untitled

Untitled

Public

project.name

Chirag

Chirag

Public

project.name

arithmetic unit

arithmetic unit

Public

project.name

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