project.name

Gyanendra Harsh Samdarshi

Member since: 3 years

Educational Institution: Not Entered

Country: Not Entered

AND gate

AND gate
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counters

counters
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JK Flip-Flop

JK Flip-Flop
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4:1 Mutiplexer

4:1 Mutiplexer
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2:4 Decoder

2:4 Decoder
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Full Subtractor

Full Subtractor
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Half Subtractor

Half Subtractor
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NOT gate

NOT gate
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OR gate

OR gate
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NAND gate

NAND gate
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NOR gate

NOR gate
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XNOR gate

XNOR gate
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XOR gate

XOR gate
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AND Gate using Universal Gates

AND Gate using Universal Gates
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OR Gate using Universal Gates

OR Gate using Universal Gates
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NOT Gate using Universal Gates

NOT Gate using Universal Gates
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NAND Gate using Universal Gates

NAND Gate using Universal Gates
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HALF ADDER

HALF ADDER
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K map

K map
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1:2 Decoder

1:2 Decoder
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NOR Gate using Universal Gates

NOR Gate using Universal Gates
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FULL ADDER

FULL ADDER
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4x1 Multiplexer

4x1 Multiplexer
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4x1 Multiplexer

4x1 Multiplexer
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XNOR Gate using Universal Gate

XNOR Gate using Universal Gate
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Untitled

Untitled
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XOR Gate using Universal Gates

XOR Gate using Universal Gates
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D Flip-Flop using NAND Gate

D Flip-Flop using NAND Gate
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Gyanendra Harsh Samdarshi is not a collaborator of any project.

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