project.name

AAKASH MITTAL

Member since: 4 years

Educational Institution: k.I.E.T

Country: India

aakash5b

aakash5b
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master slave using d flip flop

master slave using d flip flop
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Untitled

Untitled
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half adder full adder half subtractor full subtractor

half adder full adder half subtractor full subtractor
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nand sr latch usins clock

nand sr latch usins clock
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D LATCH USING NOR

D LATCH USING NOR
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demultiplexer 0f 1x8

demultiplexer 0f 1x8
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Untitled

Untitled
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exp3

exp3
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exp 10 demultiplexer

exp 10 demultiplexer
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exp3

exp3
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MULTIPLEXER 4X1

MULTIPLEXER 4X1
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design of clocked sequential circuit

design of clocked sequential circuit
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jk flip flop

jk flip flop
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SR CIRCUIT(RACE CONDITION)

SR CIRCUIT(RACE CONDITION)
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JK USING D FLIP FLOP

JK USING D FLIP FLOP
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design of clocked sequential circuit

design of clocked sequential circuit
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Decoder of 2x4

Decoder of 2x4
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experiment3

experiment3
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LOGIC UNIT

LOGIC UNIT
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ENCODER OF 4X2

ENCODER OF 4X2
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Untitled

Untitled
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aakash mittal2

aakash mittal2
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aakash mittal

aakash mittal
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3X3 ARRAY MULTIPLIER

3X3 ARRAY MULTIPLIER
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aakash4.c

aakash4.c
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Untitled

Untitled
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Decoder of 2x4

Decoder of 2x4
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DECODER OF 3X8

DECODER OF 3X8
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nand latch

nand latch
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project2

project2
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EXPERIMENT6B

EXPERIMENT6B
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aakash5

aakash5
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MULTIPLEXER OF 8X3

MULTIPLEXER OF 8X3
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sequential circuit using d flip flop

sequential circuit using d flip flop
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ENCODER OF 8X3

ENCODER OF 8X3
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t flip-flop

t flip-flop
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imlement of full adder full subtractor half adder half subtractor

imlement of full adder full subtractor half adder half subtractor
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aakash mittal

aakash mittal
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CONTROLLED SR LATCH USING NOR

CONTROLLED SR LATCH USING NOR
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sr latch

sr latch
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D LATCH USING NAND

D LATCH USING NAND
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SEQUENTIAL CIRCUIT USING JK FLIP FLOP

SEQUENTIAL CIRCUIT USING JK FLIP FLOP
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4 BIT ARITHMETIC AND LOGIC UNIT

4 BIT ARITHMETIC AND LOGIC UNIT
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aaksh mittal

aaksh mittal
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AAKASH MITTAL is not a collaborator of any project.

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