Avinash dash
Member since: 4 years
Educational Institution: Not Entered
Country: Not Entered
JK FLIPFLOP
JK FLIPFLOP
Public
Full_adder_decoder
Full_adder_decoder
Public
3-Bit MAX Counter
3-Bit MAX Counter
Public
MULTIPLEXER
MULTIPLEXER
Public
Full Adder using Decoder and OR gate ICs
Full Adder using Decoder and OR gate ICs
Public
HS
HS
Public
SR FLIPFLOP
SR FLIPFLOP
Public
Full adder using multiplexer
Full adder using multiplexer
Public
practical2
practical2
Public
3-bit by 8-bit decoder
3-bit by 8-bit decoder
Public
HALF SUBTRACTOR USEING NAND AND NOR GATES
HALF SUBTRACTOR USEING NAND AND NOR GATES
Public
Multi Input And Gate
Multi Input And Gate
Public
discrete JK-FlipFlop
discrete JK-FlipFlop
Public
Full_adder_decoder
Full_adder_decoder
Public
jk ff counter synchronous
jk ff counter synchronous
Public
discrete JK-FlipFlop
discrete JK-FlipFlop
Public
SR FLIPFLOP
SR FLIPFLOP
Public
4-bit subtractor
4-bit subtractor
Public
3 by 8 bit decoder
3 by 8 bit decoder
Public
4 bit nonrestoring divider
4 bit nonrestoring divider
Public
EXPERIMENT 5
EXPERIMENT 5
Public
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