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UntitledUntitled
UntitledTest
TestVDay
VDayTest1
Test1Example ALU
Example ALUToggle
ToggleD Flip Flop Test Au23
D Flip Flop Test Au23Blinky
BlinkyCircuit Delay Demo - V2
Circuit Delay Demo - V2Odd Flip Flop Bug
Odd Flip Flop BugUntitled
UntitledTest
TestCircuit Delay Demo
Circuit Delay DemoTestGates
TestGatesD Flip Flop Comparison
D Flip Flop ComparisonCircuit Delay Demo - V1
Circuit Delay Demo - V1CPU-Feb-18
CPU-Feb-18Digital Transmission
Digital TransmissionWrite 262
Write 262ALU-74LS181
ALU-74LS181Keep the light on
Keep the light onTwo-input multiplexer
Two-input multiplexerTestGator
TestGatorSegDisplay
SegDisplayTest0
Test0Adder Test
Adder TestBug Explorer
Bug ExplorerUntitled
UntitledClock Bug
Clock Bug1-bit Computer
1-bit ComputerExample Goals
Example GoalsFifteen-input AND/OR
Fifteen-input AND/ORExample Usage of Splitters
Example Usage of SplittersHalf-adder
Half-adderLatches vs Flip Flops in a Shift Register
Latches vs Flip Flops in a Shift RegisterOne gate to rule them all
One gate to rule them allLimited gates
Limited gatesProblem00-C
Problem00-C