project.name

Scott Feister

Member since: 6 years

Educational Institution: Not Entered

Country: United States

Untitled

Untitled
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Untitled

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Test

Test
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VDay

VDay
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Test1

Test1
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Example ALU

Example ALU
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D Flip Flop Test Au23

D Flip Flop Test Au23
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Blinky

Blinky
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Circuit Delay Demo - V2

Circuit Delay Demo - V2
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Odd Flip Flop Bug

Odd Flip Flop Bug
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Test

Test
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Circuit Delay Demo

Circuit Delay Demo
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TestGates

TestGates
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D Flip Flop Comparison

D Flip Flop Comparison
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Circuit Delay Demo - V1

Circuit Delay Demo - V1
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CPU-Feb-18

CPU-Feb-18
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Digital Transmission

Digital Transmission
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Write 262

Write 262
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ALU-74LS181

ALU-74LS181
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Two-input multiplexer

Two-input multiplexer
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Keep the light on

Keep the light on
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TestGator

TestGator
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SegDisplay

SegDisplay
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Test0

Test0
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Adder Test

Adder Test
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Bug Explorer

Bug Explorer
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Clock Bug

Clock Bug
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1-bit Computer

1-bit Computer
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Example Goals

Example Goals
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Fifteen-input AND/OR

Fifteen-input AND/OR
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Example Usage of Splitters

Example Usage of Splitters
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Latches vs Flip Flops in a Shift Register

Latches vs Flip Flops in a Shift Register
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Limited gates

Limited gates
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Problem00-C

Problem00-C
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Toggle

Toggle
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Half-adder

Half-adder
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One gate to rule them all

One gate to rule them all
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