project.name

Rupashi

Member since: 4 years

Educational Institution: University of Enginnering and Management, Kolkata

Country: India

2-bit comparator

2-bit comparator
Public
project.name

T Flip-Flop

T Flip-Flop
Public
project.name

1-bit Serial Adder

1-bit Serial Adder
Public
project.name

4:2 Encoder

4:2 Encoder
Public
project.name

4-bit Serial Adder

4-bit Serial Adder
Public
project.name

2-Bit comparator(less than operation)

2-Bit comparator(less than operation)
Public
project.name

4bit Binary to 4bit Gray Code

4bit Binary to 4bit Gray Code
Public
project.name

D flip flop and T flip flop

D flip flop and T flip flop
Public
project.name

2 bit Comparator

2 bit Comparator
Public
project.name

8:1 MUX using Logic Gates

8:1 MUX using Logic Gates
Public
project.name

4-bit Odd/Even

4-bit Odd/Even
Public
project.name

JK Flip Flop

JK Flip Flop
Public
project.name

4 bit Even Parity Checker circuit

4 bit Even Parity Checker circuit
Public
project.name

Even parity generator

Even parity generator
Public
project.name

4*1 MUX

4*1 MUX
Public
project.name

SIPO Shift Register

SIPO Shift Register
Public
project.name

SR Flip Flop

SR Flip Flop
Public
project.name

4-bit Odd Parity Checker

4-bit Odd Parity Checker
Public
project.name

4-bit Asynchronous Up counter

4-bit Asynchronous Up counter
Public
project.name

4- bit EP Checker circuit

4- bit EP Checker circuit
Public
project.name

XOR using NOR gates

XOR using NOR gates
Public
project.name

Full Adder using Logic Gates

Full Adder using Logic Gates
Public
project.name

8-bit parallel Adder

8-bit parallel Adder
Public
project.name

4-bit Asynchronous Down counter

4-bit Asynchronous Down counter
Public
project.name

4:1 Mux using Logic Gates

4:1 Mux using Logic Gates
Public
project.name

4- BCD ADDER

4- BCD ADDER
Public
project.name

1x4 Demultiplexer

1x4 Demultiplexer
Public
project.name

4-Bit BCD Adder

4-Bit BCD Adder
Public
project.name

4-bit Subtractor using Parallel Adder and XOR Gates

4-bit Subtractor using Parallel Adder and XOR Gates
Public
project.name

3 to 8 Line Decoder

3 to 8 Line Decoder
Public
project.name

Figure 4.2 A serial binary adder

Figure 4.2 A serial binary adder
Public
project.name

Right Shift Register [SIPO]

Right Shift Register [SIPO]
Public
project.name

Full Adder using 2, 4*1 MUX

Full Adder using 2, 4*1 MUX
Public
project.name

Shift Register - SIPO mode

Shift Register - SIPO mode
Public
project.name

74HC161

74HC161
Public
project.name
No result image
Rupashi is not a collaborator of any project.