Member since: 4 years
Educational Institution: University of Enginnering and Management, Kolkata
Country: India
2-bit comparator
2-bit comparatorT Flip-Flop
T Flip-Flop1-bit Serial Adder
1-bit Serial Adder4:2 Encoder
4:2 Encoder4-bit Serial Adder
4-bit Serial Adder2-Bit comparator(less than operation)
2-Bit comparator(less than operation)4bit Binary to 4bit Gray Code
4bit Binary to 4bit Gray CodeD flip flop and T flip flop
D flip flop and T flip flopSR Flip Flop
SR Flip Flop2 bit Comparator
2 bit Comparator8:1 MUX using Logic Gates
8:1 MUX using Logic Gates4-bit Odd/Even
4-bit Odd/EvenJK Flip Flop
JK Flip Flop4 bit Even Parity Checker circuit
4 bit Even Parity Checker circuitEven parity generator
Even parity generator4*1 MUX
4*1 MUXSIPO Shift Register
SIPO Shift Register4-bit Odd Parity Checker
4-bit Odd Parity Checker4-bit Asynchronous Up counter
4-bit Asynchronous Up counter4- bit EP Checker circuit
4- bit EP Checker circuitXOR using NOR gates
XOR using NOR gates8-bit parallel Adder
8-bit parallel Adder4-bit Asynchronous Down counter
4-bit Asynchronous Down counter4:1 Mux using Logic Gates
4:1 Mux using Logic Gates4- BCD ADDER
4- BCD ADDERFull Adder using Logic Gates
Full Adder using Logic Gates4-bit Subtractor using Parallel Adder and XOR Gates
4-bit Subtractor using Parallel Adder and XOR GatesRight Shift Register [SIPO]
Right Shift Register [SIPO]Full Adder using 2, 4*1 MUX
Full Adder using 2, 4*1 MUX1x4 Demultiplexer
1x4 Demultiplexer3 to 8 Line Decoder
3 to 8 Line Decoder4-Bit BCD Adder
4-Bit BCD AdderFigure 4.2 A serial binary adder
Figure 4.2 A serial binary adderShift Register - SIPO mode
Shift Register - SIPO mode74HC161
74HC161