project.name

Vinay Singh (1900290130190)

Member since: 4 years

Educational Institution: KIET GROUP OF INSTITUTIONS

Country: India

ALU Circuit design

ALU Circuit design
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exp 10 (b)

exp 10 (b)
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1X4 DEMULTIPLEXER

1X4 DEMULTIPLEXER
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coa11 experiment

coa11 experiment
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exp 10 (b)

exp 10 (b)
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SR flip flop

SR flip flop
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Decoder

Decoder
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Arithmetic logic unit

Arithmetic logic unit
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COA 10

COA 10
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JK flip flop

JK flip flop
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exp 10 (b)

exp 10 (b)
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exp 10 (b)

exp 10 (b)
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SISO and SIPO

SISO and SIPO
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SISO and SIPO

SISO and SIPO
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PISO

PISO
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exp 10 (b)

exp 10 (b)
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d flip flops

d flip flops
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Arithmetic logic unit

Arithmetic logic unit
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1X4 DEMULTIPLEXER

1X4 DEMULTIPLEXER
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exp 10 (a)

exp 10 (a)
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2*2 binary

2*2 binary
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2*2 binary

2*2 binary
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COA EXP n0. 6

COA EXP n0. 6
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d flip flops

d flip flops
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adder

adder
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adder

adder
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1X4 DEMULTIPLEXER

1X4 DEMULTIPLEXER
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2-bit Arithmetic Logic Unit

2-bit Arithmetic Logic Unit
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experiment 4

experiment 4
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Gray code and binary code

Gray code and binary code
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PIPO

PIPO
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coa 8

coa 8
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coa 9

coa 9
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internal practical ( 8X1) Multiplexers

internal practical ( 8X1) Multiplexers
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exp 10 (a)

exp 10 (a)
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1x8

1x8
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PIPO

PIPO
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JK flip flop

JK flip flop
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PIPO

PIPO
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PISO

PISO
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exp 10 (a)

exp 10 (a)
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d flip flops

d flip flops
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experiment 7

experiment 7
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3 bit parllel binary subtractor/adder

3 bit parllel binary subtractor/adder
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exp 10 (b)

exp 10 (b)
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SR flip flop

SR flip flop
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d flip flops

d flip flops
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logic gates

logic gates
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SR flip flop

SR flip flop
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Vinay Singh (1900290130190) is not a collaborator of any project.

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