project.name

mayur

Member since: 4 years

Educational Institution: Not Entered

Country: Not Entered

prime number sequence generator(0 to 7)

prime number sequence generator(0 to 7)
Public
project.name

T to jk flip flop

T to jk flip flop
Public
project.name

3:8 Decoder

3:8 Decoder
Public
project.name

Even parity checker

Even parity checker
Public
project.name

2 bit comparator

2 bit comparator
Public
project.name

Odd parity generator

Odd parity generator
Public
project.name

JK TO D FLIP FLOP

JK TO D FLIP FLOP
Public
project.name

SR to JK FF

SR to JK FF
Public
project.name

JK to SR FF

JK to SR FF
Public
project.name

2 bit down counter

2 bit down counter
Public
project.name

3 bit synchronous down counter

3 bit synchronous down counter
Public
project.name

Full subtractor using basic logic gates

Full subtractor using basic logic gates
Public
project.name

3-bit asynchronous down counter

3-bit asynchronous down counter
Public
project.name

implementation for minterm 3,5,6,7

implementation for minterm 3,5,6,7
Public
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3 bit synchronous up counter

3 bit synchronous up counter
Public
project.name

Full Adder using universal gates

Full Adder using universal gates
Public
project.name

Sequence detector (1010)

Sequence detector (1010)
Public
project.name

T to jk flip flop

T to jk flip flop
Public
project.name

Odd number sequence generator

Odd number sequence generator
Public
project.name

SR Flip Flop Verification

SR Flip Flop Verification
Public
project.name

IC74153

IC74153
Public
project.name

half subtractor using basic logic gates

half subtractor using basic logic gates
Public
project.name

Untitled

Untitled
Public
project.name

1:8 Demultiplexer

1:8 Demultiplexer
Public
project.name

3-bit asynchronous up counter

3-bit asynchronous up counter
Public
project.name

2 bit asynchronous up counter

2 bit asynchronous up counter
Public
project.name

IC74153

IC74153
Public
project.name

JK TO T FLIP FLOP

JK TO T FLIP FLOP
Public
project.name

Even parity generator

Even parity generator
Public
project.name

Gray to Binary code

Gray to Binary code
Public
project.name

JK Flip Flop Verification

JK Flip Flop Verification
Public
project.name

half adder using universal logic gates

half adder using universal logic gates
Public
project.name

reducing MSB minterms 3,5,6,7

reducing MSB minterms 3,5,6,7
Public
project.name

Full Adder using basic logic gates

Full Adder using basic logic gates
Public
project.name

half substractor using universal gates

half substractor using universal gates
Public
project.name

half adder using basic logic gates

half adder using basic logic gates
Public
project.name

Sequence Detector using MS JK Flip Flop(1010)

Sequence Detector using MS JK Flip Flop(1010)
Public
project.name

half adder using basic logic gates

half adder using basic logic gates
Public
project.name
No result image
mayur is not a collaborator of any project.