project.name

Nikita Gupta

Member since: 4 years

Educational Institution: Not Entered

Country: Not Entered

Exp-6

Exp-6
Public
project.name

Exp-6

Exp-6
Public
project.name

experiment-4

experiment-4
Public
project.name

Full adder using XOR

Full adder using XOR
Public
project.name

practicalcoa

practicalcoa
Public
project.name

Controlled Latches

Controlled Latches
Public
project.name

Clocked sequential circuit

Clocked sequential circuit
Public
project.name

exp14(b)

exp14(b)
Public
project.name

exp8 (a)

exp8 (a)
Public
project.name

K-MAP

K-MAP
Public
project.name

Controlled latches

Controlled latches
Public
project.name

experiment-5

experiment-5
Public
project.name

Logic gates

Logic gates
Public
project.name

logic gate -2

logic gate -2
Public
project.name

exp16

exp16
Public
project.name

exp 10 (a)

exp 10 (a)
Public
project.name

experiment-5

experiment-5
Public
project.name

Untitled

Untitled
Public
project.name

half adder

half adder
Public
project.name

Jk flipflop

Jk flipflop
Public
project.name

Universal(c)

Universal(c)
Public
project.name

exp 6(b)

exp 6(b)
Public
project.name

exp 11(a)

exp 11(a)
Public
project.name

Exp 9 (a)

Exp 9 (a)
Public
project.name

InternalAssessment-2*2 array Multiplier

InternalAssessment-2*2 array Multiplier
Public
project.name

Master slave D flip flop

Master slave D flip flop
Public
project.name

exp7(a)

exp7(a)
Public
project.name

Exp 12 JKflipflop

Exp 12 JKflipflop
Public
project.name

Rightshift

Rightshift
Public
project.name

exp 10 (b)

exp 10 (b)
Public
project.name

Leftshift

Leftshift
Public
project.name

ALU circuit design(a)

ALU circuit design(a)
Public
project.name

Rightshift

Rightshift
Public
project.name

exp 9 (b)

exp 9 (b)
Public
project.name

Logic gates

Logic gates
Public
project.name

InternalAssessment-3bit-Arraymultiplier

InternalAssessment-3bit-Arraymultiplier
Public
project.name

EXP 12 T FLIP FLOP

EXP 12 T FLIP FLOP
Public
project.name

exp 4

exp 4
Public
project.name

controlledLathes2

controlledLathes2
Public
project.name

Logic gates

Logic gates
Public
project.name

exp7(a)

exp7(a)
Public
project.name

Alu circuit design exp 13(b)

Alu circuit design exp 13(b)
Public
project.name

exp 8(c)

exp 8(c)
Public
project.name

exp 8 (b)

exp 8 (b)
Public
project.name

Logic gates-3

Logic gates-3
Public
project.name

experiment7(c)

experiment7(c)
Public
project.name
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