5 Input OR gate

2 Input OR gate

LAB 4, PART 3

2 Input Nor Gate

Experiment 2 - part 1

Experiment 2 (part 2)

2 Input NAND Gate

Lab 3 - D FF

2 Input XOR gate

5 Input AND gate

experiment 1 - Inverter

Inverter With Clock And Flag

3 Input AND gate

2 input clock AND gate

LAB 4, PART 4 & 5