project.name

simran garg

Member since: 4 years

Educational Institution: Not Entered

Country: Not Entered

8:3 encoder

8:3 encoder
Public
project.name

Full adder using half addder

Full adder using half addder
Public
project.name

Logic unit using multiplexer

Logic unit using multiplexer
Public
project.name

logical unit using decoder

logical unit using decoder
Public
project.name

MUX REGISTER

MUX REGISTER
Public
project.name

Full adder using half addder

Full adder using half addder
Public
project.name

grey code circuit

grey code circuit
Public
project.name

Untitled

Untitled
Public
project.name

full subtractor using mux

full subtractor using mux
Public
project.name

BUS SYSTEM EXAMPLE THREE STATE BUS

BUS SYSTEM EXAMPLE THREE STATE BUS
Public
project.name

NAND GATE GREY CODE

NAND GATE GREY CODE
Public
project.name

4:2 priority encoder

4:2 priority encoder
Public
project.name

Tristate

Tristate
Public
project.name

HALF ADDDER

HALF ADDDER
Public
project.name

increment & decrement using half adder

increment & decrement using half adder
Public
project.name

Multiplexer bus

Multiplexer bus
Public
project.name

Binary 4point subtractor

Binary 4point subtractor
Public
project.name

full adder using decoder

full adder using decoder
Public
project.name

Binary 4point subtractor

Binary 4point subtractor
Public
project.name

Full adder using half addder

Full adder using half addder
Public
project.name
No result image
simran garg is not a collaborator of any project.