project.name

Abhishek Singh

Member since: 4 years

Educational Institution: GLA University Mathura

Country: India

MUX

MUX
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ALU

ALU
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Untitled

Untitled
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2'scomplement

2'scomplement
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gate by universal gates and half adders

gate by universal gates and half adders
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latches

latches
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2 bit half adder

2 bit half adder
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7 segment display

7 segment display
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MOD 4 asynchronous counter

MOD 4 asynchronous counter
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4 bit synchronous down counter

4 bit synchronous down counter
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MOD 10 Counter

MOD 10 Counter
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4 bit Adder

4 bit Adder
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Untitled

Untitled
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Latch &flipflop

Latch &flipflop
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MOD 4 asynchronous counter

MOD 4 asynchronous counter
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3 Bit Synchronous Up Counter J-K Flip Flops

3 Bit Synchronous Up Counter J-K Flip Flops
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Half Adder using NAND gate

Half Adder using NAND gate
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full adders

full adders
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circuits

circuits
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HALF ADDERS USING BASIC AND UIVERSAL GATES

HALF ADDERS USING BASIC AND UIVERSAL GATES
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