project.name

Devansh Mittal

Member since: 4 years

Educational Institution: Not Entered

Country: India

Shift Register

Shift Register
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Flip Flops clock

Flip Flops clock
Public
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Full Adder

Full Adder
Public
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Syncronoush Mod 4 ,10 - Counter

Syncronoush Mod 4 ,10 - Counter
Public
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Asyncronoush Mod 4- Counter

Asyncronoush Mod 4- Counter
Public
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Full Adder

Full Adder
Public
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Flip Flops Latch

Flip Flops Latch
Public
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Multiplexer

Multiplexer
Public
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verification of all the basic logic gates

verification of all the basic logic gates
Public
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Half adder and Full adder

Half adder and Full adder
Public
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4- bit Binary Adder

4- bit Binary Adder
Public
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4-Bit binary Adder/Subtractor

4-Bit binary Adder/Subtractor
Public
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By using the NAND GATE made with NOT,OR and AND GATE

By using the NAND GATE made with NOT,OR and AND GATE
Public
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