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Sandhya S

Member since: 2 months

Educational Institution: Not Entered

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4x1

4x1
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half subtractor using nand gate

half subtractor using nand gate
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EXPERIMENT 5 - DESIGN OF MAGNITUDE COMPARATOR

EXPERIMENT 5 - DESIGN OF MAGNITUDE COMPARATOR
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EXPERIMENT-6

EXPERIMENT-6
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full adder using basic gates

full adder using basic gates
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EXPERIMENT 2

EXPERIMENT 2
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EXPERIMENT-1

EXPERIMENT-1
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EXPERIMENT-3

EXPERIMENT-3
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EXPERIMENT-4

EXPERIMENT-4
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1X2 DE-MULTIPLEXER USING BASIC GATES

1X2 DE-MULTIPLEXER USING BASIC GATES
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4x1

4x1
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2x1 multiplexer using NAND gate

2x1 multiplexer using NAND gate
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STUDY OF FLIP-FLOPS

STUDY OF FLIP-FLOPS
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4x1

4x1
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MULTIPLEXER LEVEL1

MULTIPLEXER LEVEL1
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Full Adder using NAND Gates

Full Adder using NAND Gates
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1:2 Demux using NAND logic

1:2 Demux using NAND logic
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Full Subtractor using basic gates

Full Subtractor using basic gates
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Full Subtractor using NAND Gates

Full Subtractor using NAND Gates
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Digital circuit Simulator online

Digital circuit Simulator online
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