Kashif Ullah Jan
Member since: 4 years
Educational Institution: university of engineering and technology peshawar
Country: Pakistan
8x3 Encoder
8x3 Encoder
• 5-bit Ripple counter using D-ff.
• 5-bit Ripple counter using D-ff.
4x1 multiplexer
4x1 multiplexer
Universal Shift Register .
Universal Shift Register .
How a simple SR-latch can be used to make a Master-Slave D-Flip Flop? Draw circuit.
How a simple SR-latch can be used to make a Master-Slave D-Flip Flop? Draw circuit.
SR-LATCHES
SR-LATCHES
SR-LATCH WITH ENABLE
SR-LATCH WITH ENABLE
Universal Shift Register .
Universal Shift Register .
2bitAdder
2bitAdder
multiplexer
multiplexer
3). Draw a circuit for the following equation, using NAND gates only.
3). Draw a circuit for the following equation, using NAND gates only.
A. 4x16 Decoder
A. 4x16 Decoder
3). Draw a circuit for the following equation, using NAND gates only.
3). Draw a circuit for the following equation, using NAND gates only.
4 bit adder
4 bit adder
Universal Shift Register
Universal Shift Register
Design a 3-bit Synchronous counter using JK flip flops
Design a 3-bit Synchronous counter using JK flip flops
multiplexer
multiplexer
4x1 multiplexer use only nand gate
4x1 multiplexer use only nand gate
FULL ADDER
FULL ADDER
FULLN ADDER BY NAND GATE ONLY
FULLN ADDER BY NAND GATE ONLY
2X4 DECODER
2X4 DECODER
4X2 ENCODER
4X2 ENCODER
4X2INCODER ONLY BY NAND gate
4X2INCODER ONLY BY NAND gate
SOP
SOP
3bit adder
3bit adder
3 BIT ADDER BY NAND GATE ONLY
3 BIT ADDER BY NAND GATE ONLY
sop F=(0,1,2,7)
sop F=(0,1,2,7)
D-LATCH
D-LATCH
Q 3). Draw a circuit for the following equation, using NAND gates only.F = AB +( C+D)' + A' C
Q 3). Draw a circuit for the following equation, using NAND gates only.F = AB +( C+D)' + A' C
2bit adder by NAND gate only
2bit adder by NAND gate only
5-bit Synchronous binary counter using JK flip flops
5-bit Synchronous binary counter using JK flip flops
Implement Universal Shift Register with the following combination, S1 S0 Operation 0 0 Shift Right 0 1 No change 1 0 Parallel Load 1 1 Shift
Implement Universal Shift Register with the following combination, S1 S0 Operation 0 0 Shift Right 0 1 No change 1 0 Parallel Load 1 1 Shift
Design a 3-bit Ripple counter using D-ff
Design a 3-bit Ripple counter using D-ff
2X4 DECODER ONLY BY NAND GATE
2X4 DECODER ONLY BY NAND GATE
3). Draw a circuit for the following equation, using NAND gates only.
3). Draw a circuit for the following equation, using NAND gates only.
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