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santhosh C L

Member since: 2 months

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EXP NO -01 VERFICATION OF LOGIC GATES

EXP NO -01 VERFICATION OF LOGIC GATES
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EXP NO -04 DESIGN OF ADDER AND SUBSTRACTOR OF CIRCUITS

EXP NO -04 DESIGN OF ADDER AND SUBSTRACTOR OF CIRCUITS
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EXP NO -2 VERFICATION OF BOOLEAN LAWS

EXP NO -2 VERFICATION OF BOOLEAN LAWS
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EXP NO -03 DESIGN OF COMBINATIONAL CIRCUIT

EXP NO -03 DESIGN OF COMBINATIONAL CIRCUIT
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EXP NO -05

EXP NO -05
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EXP-07

EXP-07
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EXP NO -08 DESIGN OF MULTIPLEXER AND DEMULTIPLEXER

EXP NO -08 DESIGN OF MULTIPLEXER AND DEMULTIPLEXER
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EXP NO -06

EXP NO -06
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EXP NO -03 DESIGN OF COMBINATIONAL CIRCUIT

EXP NO -03 DESIGN OF COMBINATIONAL CIRCUIT
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EXP-6 DESIGN MUX AND DEMUX

EXP-6 DESIGN MUX AND DEMUX
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