Saidul - Circuits

Saidul

Member since: 4 years

Educational Institution: Not Entered

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c) (O+P+Q+R) . (R.S)

c) (O+P+Q+R) . (R.S)

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I

I

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A.F

A.F

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First

First

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2nd

2nd

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Lab Task-1

Lab Task-1

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Lab performence 2

Lab performence 2

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Lab Task 2.0

Lab Task 2.0

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Untitled

Untitled

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lab task 3

lab task 3

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parity eneratoe

parity eneratoe

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lab task 4

lab task 4

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lsb tsdk 4

lsb tsdk 4

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X-oe And X nor

X-oe And X nor

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Parity Generator

Parity Generator

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Parity checker

Parity checker

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Half Adder

Half Adder

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LAb perfoemance 8

LAb perfoemance 8

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