project.name

S.Leepika

Member since: 3 months

Educational Institution: Not Entered

Country: Not Entered

VERIFICATION OF GATES USING 2X1 MUX

VERIFICATION OF GATES USING 2X1 MUX
Public
project.name

VERIFICATION OF GATES USING 2X1 MUX

VERIFICATION OF GATES USING 2X1 MUX
Public
project.name

1-Bit magnitude

1-Bit magnitude
Public
project.name

exp 4

exp 4
Public
project.name

VERIFICATION OF LOGIC GATES

VERIFICATION OF LOGIC GATES
Public
project.name

full subtractor using mux

full subtractor using mux
Public
project.name

BOOLEANS LAW

BOOLEANS LAW
Public
project.name

COMBINATIONAL CIRCUITS 1

COMBINATIONAL CIRCUITS 1
Public
project.name

COMBINATIONAL CIRCUITS 2

COMBINATIONAL CIRCUITS 2
Public
project.name

HALF ADDER AND SUBTRACTOR

HALF ADDER AND SUBTRACTOR
Public
project.name

Untitled

Untitled
Public
project.name

COMBINATIONAL CIRCUITS 3

COMBINATIONAL CIRCUITS 3
Public
project.name

FULL ADDER

FULL ADDER
Public
project.name

2 bit mc

2 bit mc
Public
project.name

2X1 Multiplexer

2X1 Multiplexer
Public
project.name

2X1 Multiplexer

2X1 Multiplexer
Public
project.name

Untitled

Untitled
Public
project.name

1X2 De-Multiplexer

1X2 De-Multiplexer
Public
project.name
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