Sudhi - Circuits

Sudhi

Member since: 4 years

Educational Institution: Not Entered

Country: Not Entered

Experiment no:10

Experiment no:10

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project.name

Priority Encoder

Priority Encoder

Public

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trial

trial

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D FLIP FLOP

D FLIP FLOP

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project.name

Flip flop

Flip flop

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project.name

Untitled

Untitled

Public

project.name

PART A) mod 14 up counter

PART A) mod 14 up counter

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project.name

half adder

half adder

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project.name

and_gate

and_gate

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project.name

Half-adder

Half-adder

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project.name

Digital

Digital

Public

project.name

Day-1

Day-1

Public

project.name

De-Morgan's Law

De-Morgan's Law

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project.name

1

1

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Full adder and Half adder

Full adder and Half adder

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project.name

Experiment no:1

Experiment no:1

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project.name

Full adder using half adder

Full adder using half adder

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project.name

4 BIT FULL ADDER

4 BIT FULL ADDER

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project.name

S

S

Public

project.name

Digital

Digital

Public

project.name

Untitled

Untitled

Public

project.name

Sudhi doesn't have any favourites.

Realize Half adder using (a) basic gates

Realize Half adder using (a) basic gates

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BASIC GATES

BASIC GATES

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project.name

HALF ADDER

HALF ADDER

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project.name