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Daanish shariff

Member since: 3 months

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VERIFICATION OF LOGIC GATES EXP1

VERIFICATION OF LOGIC GATES EXP1
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Experiments 2-verification of boolean laws

Experiments 2-verification of boolean laws
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Experiment2-verification of booleans law

Experiment2-verification of booleans law
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Untitled

Untitled
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EXPERIMRNT 2-VERIFICATIONOF BOOLEAN LAWS

EXPERIMRNT 2-VERIFICATIONOF BOOLEAN LAWS
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EXPERIMENT2- verification of Boolean law

EXPERIMENT2- verification of Boolean law
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DESIGN &HALFADDER

DESIGN &HALFADDER
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FULLN SUBTRACTOR

FULLN SUBTRACTOR
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FULL ADDER

FULL ADDER
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2 BIT using basic gates

2 BIT using basic gates
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1 BIT MAGNITUDE COMPARATOR

1 BIT MAGNITUDE COMPARATOR
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2BIT using NAND gates

2BIT using NAND gates
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