project.name

Archana Minocha

Member since: 2 months

Educational Institution: Not Entered

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Data path RTL

Data path RTL
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4-Bit Register

4-Bit Register
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4*1 Multiplexer

4*1 Multiplexer
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8x1 Multiplexer

8x1 Multiplexer
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3x8 Decoder

3x8 Decoder
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Untitled

Untitled
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logic gate

logic gate
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look ahead carry

look ahead carry
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full adder

full adder
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Binary to Gray

Binary to Gray
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Gray to Binary

Gray to Binary
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1 bit alu

1 bit alu
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