4x1 Multiplexer

Master-Slave D-Flipflop quiz

Clocked (Enabled) S-R Flip-Flop

3-Bit SIPO circuit using Flip-Flops at Gate Level

D Flip-Flop

Synchronous Binary Up Counter

AND laws

S-R Latch NOR gates

Synchronous Binary Down Counter

3-bit SISO

3-bit PISO

1-bit Binary Subtractor

8x1 Multiplexer

4-bit Binary Adder / Subtractor

Edge-Triggered D Flip-Flop

2nd point Final Exam

S-R Latch NAND gates

D Flip-Flop

4-bit Binary Adder

Asynchronous Binary Up Counter

J-K Master/Slave Flip-Flop

Decorder 4 to 16

4 bit counter using D Flipflops (NOR)

Elec 1

Elec 2

IDK

Quiz 2 4in 1out

Commutative law

Associative law

OR laws

Invertion law

Product of Sums (POS) Form

NAND gates Realization

Gray Code Converter

Odd parity with 4 bit input

4-bit Binary Subtractor

Decorder 2 to 4

Decorder 3 to 8

Decorder 3 to 8 Quiz

4 to 2 Encoder

4 to 2 priority encoder

Quiz Elec 2 3 in 1 out

Asynchronous Binary Down Counter

3-bit PIPO

Odd Parity with 3 bit input

Distributive law

Sum of Products (SOP) Form

Even Partity with 4 bit input

3-bit SIPO

Octal to Binary Encoder (8 to 3 encoder)

4 bit counter using D Flipflops (NAND)

8 to 3 Priority encorder

Even Partity with 3 bit input

3-bit Binary Subtractor Gates