MANVITHA.K
Member since: 4 months
Educational Institution: Not Entered
Country: Not Entered
Ex 2 L 1 verification of boolean laws
Ex 2 L 1 verification of boolean laws
Ex 2 L2 VERIFIVATION OF BOOLEAN LAWS
Ex 2 L2 VERIFIVATION OF BOOLEAN LAWS
Untitled
Untitled
Untitled
Untitled
EX-6 L-2 DESIGN OF MULTIPLEXER AND DEMULTIPLEXER
EX-6 L-2 DESIGN OF MULTIPLEXER AND DEMULTIPLEXER
E-4 L-2 DESIGN OF ADDER AND SUBTRACTOR CIRCUITS
E-4 L-2 DESIGN OF ADDER AND SUBTRACTOR CIRCUITS
EXP-1 L-1 Verification of Logic Gates
EXP-1 L-1 Verification of Logic Gates
EX 1 DESIGN OF COMBINATIONAL CIRCUIT
EX 1 DESIGN OF COMBINATIONAL CIRCUIT
L-2 EX -3 DESIGN OF COMBINATIONAL CIRCUITS
L-2 EX -3 DESIGN OF COMBINATIONAL CIRCUITS
L-2 Ex-1 verification of logic gates
L-2 Ex-1 verification of logic gates
EX-7 DESIGN OF CIRCUIT USING MULTIPLEXER
EX-7 DESIGN OF CIRCUIT USING MULTIPLEXER
Ex-4 L-1 Design of adder or subtractor circuits
Ex-4 L-1 Design of adder or subtractor circuits
E-4 L-1 DESIGN OF ADDER AND SUBTRACTOR CIRCUITS
E-4 L-1 DESIGN OF ADDER AND SUBTRACTOR CIRCUITS
EX-4 L-2 DESIGN OF ADDER AND SUBTRACTOR CIRCUITS
EX-4 L-2 DESIGN OF ADDER AND SUBTRACTOR CIRCUITS
E-4 L-2 DESIGN OF ADDER AND SUBTRACTOR CIRCUITS
E-4 L-2 DESIGN OF ADDER AND SUBTRACTOR CIRCUITS
EX-5 L-1 DESIGN OF MAGNITUDE COMPARATOR
EX-5 L-1 DESIGN OF MAGNITUDE COMPARATOR
EX-5 L-2 DESIGN OF MAGNITUDE COMPARATOR
EX-5 L-2 DESIGN OF MAGNITUDE COMPARATOR
EX-5 L-3 DESIGN OF MAGNITUDE COMPARATOR
EX-5 L-3 DESIGN OF MAGNITUDE COMPARATOR
EX-6 L-1 DESIGN OF MULTIPLEXER AND DEMULTIPLEXER
EX-6 L-1 DESIGN OF MULTIPLEXER AND DEMULTIPLEXER
EX-7 l-2
EX-7 l-2
last.....
last.....
Untitled
Untitled
MANVITHA.K doesn't have any favourites.
